SI3215-C-GMR Silicon Laboratories Inc, SI3215-C-GMR Datasheet - Page 103
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SI3215-C-GMR
Manufacturer Part Number
SI3215-C-GMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI3215-C-GMR.pdf
(118 pages)
Specifications of SI3215-C-GMR
Lead Free Status / RoHS Status
Compliant
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4.2. Digital Programmable Gain/Attenuation
See functional description sections of digital programmable gain/attenuation for guidelines on computing register
values. All values are represented in twos-complement format.
Note: The values of all indirect registers are undefined following the reset state. Shaded areas denote bits that can be read
Addr.
Addr. D15
13
14
13
14
and written but should be written to zeroes.
Receive Path Digital to Analog Converter Gain/Attenuation.
This register sets gain/attenuation for the receive path. The digitized signal is effectively mul-
tiplied by DACG to achieve gain/attenuation. A value of 0x00 corresponds to – ∞ dB gain
(mute). A value of 0x400 corresponds to unity gain. A value of 0x7FF corresponds to a gain
of 6 dB.
Transmit Path Analog to Digital Converter Gain/Attenuation.
This register sets gain/attenuation for the transmit path. The digitized signal is effectively
multiplied by ADCG to achieve gain/attenuation. A value of 0x00 corresponds to – ∞ dB gain
(mute). A value of 0x400 corresponds to unity gain. A value of 0x7FF corresponds to a gain
of 6 dB.
Table 38. Digital Programmable Gain/Attenuation Indirect Registers Description
Address
Table 37. Digital Programmable Gain/Attenuation Indirect Registers Summary
7
8
9
D14
Table 36. Oscillator Indirect Registers Description (Continued)
D13
Ringing Oscillator Frequency Coefficient.
Sets ringing generator frequency.
Ringing Oscillator Amplitude Register.
Sets ringing generator signal amplitude.
Ringing Oscillator Initial Phase Register.
Sets initial phase of ringing generator signal.
D12
D11
DACG[11:0]
ADCG[11:0]
D10
Description
Description
D9
Rev. 0.92
D8
D7
D6
D5
D4
Reference Page
D3
35
35
35
D2
Si3215
Reference
D1
Page
39
39
D0
103
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