AM79Q02JC AMD (ADVANCED MICRO DEVICES), AM79Q02JC Datasheet - Page 46

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AM79Q02JC

Manufacturer Part Number
AM79Q02JC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM79Q02JC

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26, 27. Write/Read Interrupt Mask Register
28, 29. Write/Read Operating Conditions
46
(6C/6Dh)
R/W = 0: Write
R/W = 1: Read
(70/71h)
R/W = 0: Write
R/W = 1: Read
Mask CD Interrupt
This command does not depend on the state of the Channel Enable Register.
* Power Up and Hardware Reset (
Cutoff Transmit Path
Cutoff Receive Path
High Pass Filter
Lower Receive Gain
Arm Transmit Interrupt
Interface Loopback
Full Digital Loopback
1 kHz Receive Tone
* Power Up and Hardware Reset (
The B Filter is disabled during receive cutoff.
Command
I/O Data
Command
I/O Data
MCDxy = 0
MCDxy = 1*
x
y
Masked: A change does not cause the Interrupt Pin to go Low.
CTP = 0*
CTP = 1
CRP = 0*
CRP = 1
HPF = 0*
HPF = 1
RG = 0*
RG = 1
ATI = 0*
ATI = 1
ILB = 0*
ILB = 1
FDL = 0*
FDL = 1
TON = 0*
TON = 1
MCDB4
D
0
Am79Q02/021/031 Data Sheet
7
CTP
D
0
7
MCDA4
CDxy bit is NOT MASKED
CDxy bit is MASKED
Bit number (A or B)
Channel number (1 through 4)
Transmit path connected
Transmit path cut off
Receive path connected
Receive path cutoff (see note)
Transmit Highpass filter enabled
Transmit Highpass filter disabled
6 dB loss not inserted
6 dB loss inserted
Transmit Interrupt not Armed
Transmit Interrupt Armed
TSA loopback disabled
TSA loopback enabled
Full digital loopback disabled
Full digital loopback enabled
1 kHz receive tone off
1 kHz receive tone on
D
1
6
RST
RST
CRP
D
1
6
MCDB3
) Value = FFh.
) Value = 00h.
D
1
5
HPF
D
1
5
MCDA3
D
0
4
RG
D
1
4
MCDB2
D
1
3
ATI
D
0
3
MCDA2
D
1
2
ILB
D
0
2
MPI Command
MPI Command
MCDB1
D
0
FDL
1
D
0
1
MCDA1
R/W
TON
D
R/W
D
0
0

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