PEB3265FV15XP Infineon Technologies, PEB3265FV15XP Datasheet - Page 63
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PEB3265FV15XP
Manufacturer Part Number
PEB3265FV15XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3265FV15XP.pdf
(383 pages)
Specifications of PEB3265FV15XP
On-hook Transmission
Yes
Polarity Reversal
Yes
On-chip Ring Relay Driver
Yes
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TQFP
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Lead Free Status / RoHS Status
Compliant
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Preliminary
3.8
The signal processing capabilities described in this chapter are realized by an Enhanced
Digital Signal Processor (EDSP) except for DTMF generation. Each function can be
individually enabled or disabled for each DuSLIC channel. Therefore power
consumption can be reduced according to the needs of the application. For the MIPS
requirements of the different EDSP algorithms see
Figure 31
matching loop, trans-hybrid filter, gain stages and the connection to the EDSP.
Figure 31
Figure 32
names and SOP commands.
Figure 32
Data Sheet
VOUT
VIN
+
IM1
+
TH
shows a closeup on the EDSP signal path shown in
shows the AC signal path for DuSLIC with the ADCs and DACs, impedance
DuSLIC Enhanced Signal Processing Capabilities
ADC
DAC
DAC
DuSLIC AC Signal Path
DuSLIC EDSP Signal Path
LPX
FRX
LPR
FRR
IM2
+
HPX1
AR1
AX1
+
TTXG
TTXA
G
L E C -X I
G
S
L E C ,T IN
IM3
LEC
G
S
S
S L E C ,R
L E C ,T O U T
G
CID
HPX2
HPR2
TG
AR2
AX2
L E C -R I
+
LE C -O U T
G
LE C -X 0
G
LE C-EN
TH
63
+
LEC -EN
S
S U M
LPX
FRX
LPR
FRR
U TD X-S UM
UT DR
-SUM
DT M F -S RC
UT DX -SR C
Chapter
HPR1
HPX1
AX1
AR1
UT DR -EN
G
UT DX -EN
D T M F
G
DuSLIC_0006_EDSPsignal_path.emf
LEC
DT M F -E N
DuSLIC_0005_ACsignal_path.emf
3.8.5.
CID
TG
+
Figure 31
Functional Description
UTDX
DTMF
UTDR
CMP
EXP
Switch
S
XO U T
S
R IN
x
R
Switch position
shown for control
bit set to 0
outlining signal
2000-07-14
DuSLIC
DTMF
UTD
UTD
CMP
EXP
EDSP
XOUT
RIN
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