MCP4725A2T-E/CH Microchip Technology, MCP4725A2T-E/CH Datasheet - Page 29

• Manufacturer Part Number: MCP4725A2T-E/CH
• Description: DAC 1-CH Resistor-String 12-Bit 6-Pin SOT-23 T/R
• Manufacturer: Microchip Technology

Specifications of MCP4725A2T-E/CH

• Package: 6SOT-23
• Resolution: 12 Bit
• Architecture: Resistor-String
• Digital Interface Type: Serial (2-Wire, I2C)
• Number Of Outputs Per Chip: 1
• Output Type: Voltage
• Full Scale Error: ±2 %FSR
• Integral Nonlinearity Error: ±14.5 LSB
• Maximum Settling Time: 6(Typ) us
• Settling Time: 6µs
• Number Of Bits: 12
• Data Interface: I²C, Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP4725DM-PTPLS - BOARD DAUGHTER PICTAIL MCP4725
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MCP4725A2T-E/CH; MCP4725A2T-E/CHTR

7.5.5
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this acknowledge bit.
The device that acknowledges, has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
FIGURE 7-3:
© 2009 Microchip Technology Inc.
SDA
SCL
(A)
ACKNOWLEDGE
CONDITION
START
(B)
Data Transfer Sequence On The Serial Bus.
ACKNOWLEDGE
ADDRESS OR
VALID
(D)
TO CHANGE
ALLOWED
DATA
course, setup and hold times must be taken into
account. During reads, a master must send an end of
data to the slave by not generating an acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (MCP4725) will leave the data
line HIGH to enable the master to generate the STOP
condition.
(D)
MCP4725
DS22039D-page 29
CONDITION
STOP
(C)
(A)