MCP4725A2T-E/CH Microchip Technology, MCP4725A2T-E/CH Datasheet - Page 31

• Manufacturer Part Number: MCP4725A2T-E/CH
• Description: DAC 1-CH Resistor-String 12-Bit 6-Pin SOT-23 T/R
• Manufacturer: Microchip Technology

Specifications of MCP4725A2T-E/CH

• Package: 6SOT-23
• Resolution: 12 Bit
• Architecture: Resistor-String
• Digital Interface Type: Serial (2-Wire, I2C)
• Number Of Outputs Per Chip: 1
• Output Type: Voltage
• Full Scale Error: ±2 %FSR
• Integral Nonlinearity Error: ±14.5 LSB
• Maximum Settling Time: 6(Typ) us
• Settling Time: 6µs
• Number Of Bits: 12
• Data Interface: I²C, Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: SOT-23-6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP4725DM-PTPLS - BOARD DAUGHTER PICTAIL MCP4725
• Power Dissipation (max): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MCP4725A2T-E/CH; MCP4725A2T-E/CHTR

TABLE 7-1:
© 2009 Microchip Technology Inc.
Electrical Specifications: Unless otherwise specified, all limits are specified for T
Clock frequency
Clock high time
Clock low time
SCL rise time
(Note 1)
SCL fall time
(Note 1)
SDA rise time
(Note 1)
SDA fall time
(Note 1)
Data hold time
(Note 4)
Output valid from clock
(Notes 2 and 3)
START condition hold time
START (Repeated) condition
setup time
Data input setup time
STOP condition setup time
Note 1:
High Speed Mode (Note 5)
2:
3:
4:
5:
Parameters
This parameter is ensured by characterization and not 100% tested.
This specification is not a part of the I2C specification. This specification is equivalent to the Data Hold Time (
plus SDA Fall (or rise) time:
If this parameter is too short, it can create an unintended START or STOP condition to other devices on the same bus
line. If this parameter is too long, Clock Low time (T
For Data Input: This parameter must be longer than t
Clock Low time (T
For Data Output: This parameter is characterized, and tested indirectly by testing T
All timing parameters in high-speed modes are tested at V
I
2
C SERIAL TIMING SPECIFICATIONS (CONTINUED)
LOW
) can be affected.
T HD:DAT
T HD:STA
T
T SU:DAT
T SU:STO
T R: DAT
T F: DAT
T R:SCL
T F:SCL
T HIGH
T LOW
SU:STA
Sym
f
T AA
SCL
T AA
= T
HD:DAT
120
160
320
160
160
160
Min
60
10
—
—
—
—
—
—
—
—
—
—
0
0
0
0
+ T
F
(
OR
LOW
Typ
T
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SP
R
).
. If this parameter is too long, the Data Input Setup (T
) can be affected.
DD
= 5V.
Max
160
160
150
150
310
3.4
1.7
40
80
40
80
80
80
70
—
—
—
—
—
—
—
—
A
= -40 to +85°C, V
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AA
C
C
C
C
C
C
From V
C
From V
C
From V
C
From V
C
From V
C
From V
C
From V
C
From V
C
C
C
C
C
After this period, the first clock
pulse is generated
parameter.
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
b
DD
= 100 pF
= 400 pF
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= 100 pF, f
= 400 pF, f
= +2.7V to +5.0V, V
MCP4725
IL
IL
IH
IH
IL
IL
IH
IH
to V
to V
to V
to V
to V
to V
to V
to V
DS22039D-page 31
IH
IH
IH
IH
SCL
SCL
SCL
SCL
SCL
SCL
IL
SCL
IL
SCL
SCL
SCL
IL
SCL
IL
SCL
SCL
SCL
SCL
SCL
Conditions
,
,
,
,
,
,
,
,
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
= 3.4 MHz
= 1.7 MHz
SU:DAT
T HD:DAT
SS
= 0V.
) or
)