MCP23S09T-E/MG Microchip Technology, MCP23S09T-E/MG Datasheet
MCP23S09T-E/MG
Specifications of MCP23S09T-E/MG
Related parts for MCP23S09T-E/MG
MCP23S09T-E/MG Summary of contents
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... SO SCL SDA RESET INT Multi-bit ADDR Decode © 2009 Microchip Technology Inc. MCP23009/MCP23S09 • Configurable interrupt source: - Interrupt-on-change from configured defaults or pin change • Polarity inversion register to configure the polarity of the input port data • External reset input • Low standby current µ ...
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... GP4 14 GP0 8 GP3 13 GP1 9 12 GP2 Table 1-1 and.Table 1-2 MCP23S09 GP7 16 GP6 15 GP5 14 GP4 13 GP3 12 GP2 11 GP1 10 Table 1-1 and.Table 1-2 QFN V GP3 GP2 GP1 3 10 SCL GP0 QFN * V GP3 SCK GP2 GP1 GP0 4 9 © 2009 Microchip Technology Inc. ...
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... The Power-on Reset (POR) sets the registers to their default values and initializes the device state machine. The hardware address pin is used to determine the device address. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 from its from a ...
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... I/O Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled for interrupt on change, and/or internal pull-up resistor. Not connected Exposed Thermal Pad (EP). Do not electrically connect. Can connect © 2009 Microchip Technology Inc. ...
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... Bidirectional I/O Pin (5.5 volt tolerant inputs; open-drain outputs). Can be enabled for interrupt on change, and/or internal pull-up resistor — Not connected EP — 17 — Exposed Thermal Pad (EP). Do not electrically connect, Can connect to V © 2009 Microchip Technology Inc. MCP23009/MCP23S09 Standard Function . SS DS22121B-page 5 ...
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... Mode, the operation control). The sequence ends with the master sending a Stop or Restart condition. The MCP23009 address pointer will roll over to address zero after reaching the last register address. Refer to Figure 1-1. Figure 1-1. This sequence is © 2009 Microchip Technology Inc. ...
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... The SPI write operation is started by lowering CS. The write command (slave address with R/W bit cleared) is then clocked into the device. The opcode is followed by an address and at least one data byte. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 1.3.3.2 SPI Read Operation The SPI read operation is started by lowering CS. The SPI read command (slave address with R/W bit set) is then clocked into the device ...
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... Sequential S OP Byte S OP Sequential S OP DS22121B-page .... W ADDR OUT .... ADDR P Byte and Sequential Write D W ADDR ADDR IN .... Byte and Sequential Read W ADDR ADDR OUT P OUT .... D ADDR IN P .... D OUT OUT OUT P .... D D .... IN OUT OUT .... OUT OUT P © 2009 Microchip Technology Inc. ...
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... V DD ADDR © 2009 Microchip Technology Inc. MCP23009/MCP23S09 2. The 3-bit address is latched after t 3. The module powers down after the first rising edge of the serial clock is detected (t Once the address bits are latched, the device will keep the slave address until a POR or reset condition occurs ...
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... Tolerance (total) V2(min) V2(max) 0.00 0.37 1.01 1.05 1.70 1.74 2.38 2.43 3.07 3.12 3.76 3.80 4.45 4.49 5.13 5.50 © 2009 Microchip Technology Inc. ...
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... FIGURE 1-4: FLASH ADC BLOCK DIAGRAM V DD analog_in adc_en gnd © 2009 Microchip Technology Inc. MCP23009/MCP23S09 addr_out[ adc_en adc_en en addr_out[5] adc_en reset addr_out[4] set ' adc_en i2c_clk addr_out[3] adc_en addr_out[2] adc_en addr_out[1] adc_en addr_out[0] adc_en addr[6:0] i2c_addr[2:0] adc_en DS22121B-page 11 ...
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... Slave Address Start bit R write R read FIGURE 1-7: Figure 1 Slave Address R write R read 2 I C™ CONTROL BYTE FORMAT Control Byte R/W ACK R/W bit ACK bit SPI CONTROL BYTE FORMAT Control Byte R/W R/W bit © 2009 Microchip Technology Inc. ...
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... FIGURE 1-8: I C™ ADDRESSING REGISTERS Device Opcode The ACKs are provided by the MCP23009. FIGURE 1-9: SPI ADDRESSING REGISTERS Device Opcode © 2009 Microchip Technology Inc. MCP23009/MCP23S09 0 ACK R Register Address 0 R Register Address ACK DS22121B-page 13 ...
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... Writing to the GPIOn register actually causes a write to the latches (OLATn). Writing to the OLATn register forces the associated output drivers to drive to the level in OLATn. Pins configured as inputs turn off the associated output driver and put it in high-impedance. DS22121B-page 14 © 2009 Microchip Technology Inc. ...
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... GPPUA 06 PU7 PU6 INTFA 07 INT7 INT6 INTCAPA 08 ICP7 ICP6 GPIOA 09 GP7 GP6 OLATA 0A OL7 OL6 © 2009 Microchip Technology Inc. MCP23009/MCP23S09 bit 5 bit 4 bit 3 bit 2 IO5 IO4 IO3 IO2 IP5 IP4 IP3 IP2 GPINT5 GPINT4 GPINT3 GPINT2 DEF5 DEF4 DEF3 ...
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... IO7:IO0: Controls the direction of data I/O <7:0> Pin is configured as an input 0 = Pin is configured as an output DS22121B-page 16 R/W-1 R/W-1 R/W-1 IO4 IO3 IO2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 R/W-1 IO1 IO0 bit Bit is unknown © 2009 Microchip Technology Inc. ...
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... IP7:IP0: Controls the polarity inversion of the input pins <7:0> GPIO register bit will reflect the opposite logic state of the input pin 0 = GPIO register bit will reflect the same logic state of the input pin © 2009 Microchip Technology Inc. MCP23009/MCP23S09 R/W-0 R/W-0 ...
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... Enable GPIO input pin for interrupt-on-change event 0 = Disable GPIO input pin for interrupt-on-change event Refer to INTCON and DEFVAL. DS22121B-page 18 R/W-0 R/W-0 R/W-0 GPINT4 GPINT3 GPINT2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 GPINT1 GPINT0 bit Bit is unknown © 2009 Microchip Technology Inc. ...
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... DEF7:DEF0: Sets the compare value for pins configured for interrupt-on-change from defaults <7:0>. Refer to INTCON. If the associated pin level is the opposite from the register bit, an interrupt occurs. Refer to INTCON and GPINTEN. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 R/W-0 R/W-0 R/W-0 ...
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... Pin value is compared against the associated bit is DEFVAL register 0 = Pin value is compared against the previous pin value Refer to DEFVAL and GPINTEN. DS22121B-page 20 R/W-0 R/W-0 R/W-0 IOC4 IOC3 IOC2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 IOC1 IOC0 bit Bit is unknown © 2009 Microchip Technology Inc. ...
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... INTCC: Interrupt Clearing Control 1 = Reading INTCAP register clears the interrupt 0 = Reading GPIO register clears the interrupt © 2009 Microchip Technology Inc. MCP23009/MCP23S09 The Interrupt Polarity (INTPOL) sets the polarity of the INT pin. This bit is functional only when the ODR bit is cleared, configuring the INT pin as active push-pull ...
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... DS22121B-page 22 R/W-0 R/W-0 R/W-0 PU4 PU3 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared T = +25°C 2 (V) DD R/W-0 R/W-0 PU2 PU1 PU0 bit Bit is unknown -40° +125° +85°C 4.5 5 5.5 © 2009 Microchip Technology Inc. ...
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... Value at POR ‘1’ = Bit is set bit 7-0 INT7:INT0: Reflects the interrupt condition on the port. Will reflect the change only if interrupts are enabled (GPINTEN) <7:0> Pin caused interrupt 0 = Interrupt not pending © 2009 Microchip Technology Inc. MCP23009/MCP23S09 R-0 R-0 R-0 INT4 INT3 INT2 U = Unimplemented bit, read as ‘ ...
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... ICP7:ICP0: Reflects the logic level on the port pins at the time of interrupt due to pin change <7:0> Logic-high 0 = Logic-low DS22121B-page 24 R-x R-x R-x ICP4 ICP3 ICP2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared © 2009 Microchip Technology Inc. R-x R-x ICP1 ICP0 bit Bit is unknown ...
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... Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-0 GP7:GP0: Reflects the logic level on the pins <7:0> Logic-high 0 = Logic-low © 2009 Microchip Technology Inc. MCP23009/MCP23S09 R/W-0 R/W-0 R/W-0 GP4 GP3 GP2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared ...
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... OL7:OL0: Reflects the logic level on the output latch <7:0> Logic-high 0 = Logic-low DS22121B-page 26 R/W-0 R/W-0 R/W-0 OL4 OL3 OL2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 OL1 OL0 bit Bit is unknown © 2009 Microchip Technology Inc. ...
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... INTCAP register. Subsequent interrupt conditions on the port will not cause an interrupt to occur as long as the interrupt is not cleared by a read of INTCAP or GPIO. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 1.7.4 CLEARING INTERRUPTS The interrupt will remain active until the INTCAP or GPIO register is read (depending on IOCON ...
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... Port value is captured or INTCAP is captured into INTCAP into INTCAP FIGURE 1-12: INTERRUPT-ON-CHANGE FROM REGISTER DEFAULT DEFVAL GP GP2 INT ACTIVE ACTIVE Port value Read GPIO is captured or INTCAP into INTCAP (INT clears only if interrupt condition does not exist.) © 2009 Microchip Technology Inc. ACTIVE ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 ..................................................................................................... -0.3V to +14V (except V and GPIOA/B) ...
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... T ≤ +85°C µA A +85°C ≤ T ≤ +125°C µ ≤ V ≤ V µ PIN DD ≤ V ≤ V µ PIN DD µ 5V, GP Pins = Note 8 (open-drain 1 3 3 -3 -400 µ 1. © 2009 Microchip Technology Inc. ...
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... POR at device power up POR 34 Tio Output Hi-impedance from Z RESET Low Note 1: This parameter is characterized, not 100% tested. 2: Data in the Typical (“Typ”) column is at 5V, +25°C, unless otherwise stated. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 V DD Pin 1 kΩ 135 ≤ +125°C. ...
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... Min Typ Max — — 500 — — 600 — 450 — — — 600 — — LSb of data byte zero during a write or read command, depending on parameter 50 51 INT pin inactive 53 52 Units Conditions Note Note 1 © 2009 Microchip Technology Inc. ...
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... This parameter is characterized, not 100% tested. 2: Data in the Typical (“Typ”) column is at 5V, +25°C, unless otherwise stated.. FIGURE 2-4: HARDWARE ADDRESS LATCH TIMING adc_en i2c_addr[2:0] SCL © 2009 Microchip Technology Inc. MCP23009/MCP23S09 ≤ +125° Min Typ Max stable after — 0 — — ...
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... Condition Note 1: Refer to Figure 2-1 for load conditions. 2 FIGURE 2- BUS DATA TIMING 103 SCL 90 91 SDA In 109 SDA Out Note 1: Refer to Figure 2-1 DS22121B-page 34 100 101 106 107 109 for load conditions STOP Condition 102 92 110 © 2009 Microchip Technology Inc. ...
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... MHz mode Note 1: This parameter is characterized, not 100% tested specified from 10 to 400 (pF This parameter is not applicable in high-speed mode (3.4 MHz). © 2009 Microchip Technology Inc. MCP23009/MCP23S09 Operating Conditions (unless otherwise indicated): 1.8V ≤ V ≤ 5.5V at -40°C ≤ T ≤ +125° (SCL, SDA kΩ ...
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... Units Conditions µs 1.8V – 5.5V 0.9 µs 1.8V – 5.5V µs 2.7V – 5.5V — µs 1.8V – 5.5V — µs 1.8V – 5.5V µs 2.7V – 5.5V 400 pF (Note 1) pF (Note (Note (Note LSB in © 2009 Microchip Technology Inc. ...
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... FIGURE 2-8: SPI OUTPUT TIMING SCK 12 SO MSB out SI © 2009 Microchip Technology Inc. MCP23009/MCP23S09 13 don’t care 2 Mode 1,1 Mode 0,0 14 LSB out DS22121B-page 37 ...
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... T = +125° +85° +25°C 2 (V) DD Conditions 1.8V – 5. 1.8V – 5.5V ns 1.8V – 5.5V ns 1.8V – 5.5V ns 1.8V – 5.5V µs Note 1 µs Note 1 ns 1.8V – 5.5V ns 1.8V – 5. 1.8V – 5. 4.5 5 5.5 © 2009 Microchip Technology Inc. ...
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... Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 Example 239 E919 ...
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... MCP23009/MCP23S09 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS22121B-page 40 © 2009 Microchip Technology Inc. ...
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... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2009 Microchip Technology Inc. MCP23009/MCP23S09 DS22121B-page 41 ...
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... MCP23009/MCP23S09 /HDG 3ODVWLF 'XDO ,Q /LQH 3 ± 1RWH N NOTE 1RWHV DS22121B-page 42 PLO %RG\ >3', © 2009 Microchip Technology Inc. ...
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... D N NOTE 1RWHV © 2009 Microchip Technology Inc. MCP23009/MCP23S09 PP %RG\ >62,& α φ A2 β DS22121B-page 43 ...
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... MCP23009/MCP23S09 /HDG 3ODVWLF 6KULQN 6PDOO 2XWOLQH 66 ± 1RWH D N NOTE 1RWHV DS22121B-page 44 PP %RG\ >6623 © 2009 Microchip Technology Inc. φ L ...
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... APPENDIX A: REVISION HISTORY Revision B (May 2009) The following is the list of modifications: 1. Added the 3x3 QFN package (MG package marking). 2. Updated Revision History. Revision A (December 2008) • Original Release of this Document. © 2009 Microchip Technology Inc. MCP23009/MCP23S09 DS22121B-page 45 ...
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... MCP23009/MCP23S09 NOTES: DS22121B-page 46 © 2009 Microchip Technology Inc. ...
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... MCP23009T-E/SS: Tape and Reel, f) MCP23009-E/MG: Extended Temp., a) MCP23S09-E/P: b) MCP23S09-E/SO: Extended Temp., c) MCP23S09T-E/SO: Tape and Reel, d) MCP23S09T-E/MG: Tape and Reel, Extended Temp., 18LD PDIP package. 18LD SOIC package. Extended Temp., 18LD SOIC package. Extended Temp., 20LD SSOP package. Extended Temp., 20LD SSOP package. ...
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... MCP23009/MCP23S09 NOTES: DS22121B-page 48 © 2009 Microchip Technology Inc. ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...