PIC16C72A-20/SS Microchip Technology, PIC16C72A-20/SS Datasheet - Page 11
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PIC16C72A-20/SS
Manufacturer Part Number
PIC16C72A-20/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C62B-04SO.pdf
(120 pages)
4.PIC16C72A-04SP.pdf
(6 pages)
Specifications of PIC16C72A-20/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1025 - ADAPTER 28-SSOP TO 28-DIP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C72A-20/SS
Manufacturer:
MICROCHIP
Quantity:
125
Part Number:
PIC16C72A-20/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
2.2.2.1
The STATUS register, shown in Register 2-1, contains
the arithmetic status of the ALU, the RESET status and
the bank select bits for data memory.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, the write to these three bits is dis-
abled. These bits are set or cleared according to the
device logic. The TO and PD bits are not writable. The
result of an instruction with the STATUS register as
destination may be different than intended.
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
REGISTER 2-1:
1999 Microchip Technology Inc.
bit7
bit 7:
bit 6-5: RP1:RP0: Register Bank Select bits (used for direct addressing)
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W-0
IRP
STATUS REGISTER
IRP: Register Bank Select bit (used for indirect addressing)
(reserved, maintain clear)
01 = Bank 1 (80h - FFh)
00 = Bank 0 (00h - 7Fh)
Each bank is 128 bytes
Note: RP1 is reserved, maintain clear
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions) (for borrow, the polarity is reversed)
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions) (for borrow, the polarity is reversed)
1 = A carry-out from the most significant bit of the result occurred
0 = No carry-out from the most significant bit of the result occurred
Note: For borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the
second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of
the source register.
R/W-0
RP1
STATUS REGISTER (ADDRESS 03h, 83h)
R/W-0
RP0
R-1
TO
R-1
PD
Preliminary
R/W-x
Z
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect the Z, C or DC bits from the STATUS register. For
other instructions, not affecting any status bits, see the
"Instruction Set Summary."
Note 1: The IRP and RP1 bits are reserved. Main-
Note 2: The C and DC bits operate as a borrow
R/W-x
DC
tain these bits clear to ensure upward
compatibility with future products.
and digit borrow bit, respectively, in sub-
traction. See the SUBLW and SUBWF
instructions.
PIC16C62B/72A
R/W-x
C
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
read as ‘0’
DS35008B-page 11