PIC16C72A-20/SS Microchip Technology, PIC16C72A-20/SS Datasheet - Page 97
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PIC16C72A-20/SS
Manufacturer Part Number
PIC16C72A-20/SS
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SSOP,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C62B-04SO.pdf
(120 pages)
4.PIC16C72A-04SP.pdf
(6 pages)
Specifications of PIC16C72A-20/SS
Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
309-1025 - ADAPTER 28-SSOP TO 28-DIP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C72A-20/SS
Manufacturer:
MICROCHIP
Quantity:
125
Part Number:
PIC16C72A-20/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 13-13: EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
TABLE 13-9:
70
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Param.
1998 Microchip Technology Inc.
No.
SCK
(CKP = 0)
(CKP = 1)
SDO
SDI
SDI
SS
SCK
† Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only
Note:
and are not tested.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ SS to SDO output hi-impedance
TscR
TscF
TscH2doV,
TscL2doV
TscH2ssH,
TscL2ssH
Symbol
B
2
B
Refer to Figure 13-4 for load conditions.
EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING (CKE = 0)
SS to SCK or SCK input
SCK input high time
(slave mode)
SCK input low time
(slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SCK output rise time
(master mode)
SCK output fall time (master mode)
SDO data output valid
after SCK edge
SS
70
after SCK edge
80
71
73
Characteristic
MSb IN
MSb
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
PIC16CXX
PIC16LCXX
PIC16CXX
PIC16LCXX
PIC16CXX
PIC16LCXX
Preliminary
BIT6 - - - - - -1
BIT6 - - - -1
1.25T
1.25T
1.5T
1.5T
78
79
Min
T
100
100
CY
CY
40
40
10
—
—
—
—
—
CY
CY
CY
+ 40
+ 40
+ 30
+ 30
PIC16C62B/72A
LSb
79
78
LSb IN
Typ† Max Units
10
20
10
10
20
10
—
—
—
—
—
—
—
—
—
—
—
—
83
100
77
25
45
25
50
25
45
25
50
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS35008B-page 97
Note 1
Note 1
Note 1
Conditions