PIC16F1938-E/MV Microchip Technology, PIC16F1938-E/MV Datasheet - Page 342
![28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE](/photos/12/13/121305/c04-152_mv_sml.jpg)
PIC16F1938-E/MV
Manufacturer Part Number
PIC16F1938-E/MV
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1938-ISS.pdf
(10 pages)
Specifications of PIC16F1938-E/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1933-ISS PDF datasheet #3
- PIC16F1938-ISS PDF datasheet #4
- Current page: 342 of 508
- Download datasheet (5Mb)
PIC16F193X/LF193X
26.5
The LCD driver module can be configured into one of
four multiplex types:
• Static (only COM0 is used)
• 1/2 multiplex (COM<1:0> are used)
• 1/3 multiplex (COM<2:0> are used)
• 1/4 multiplex (COM<3:0> are used)
The LMUX<1:0> bit setting of the LCDCON register
decides which of the LCD common pins are used (see
Table 26-4 for details).
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. If the pin is a COM drive,
then the TRIS setting of that pin is overridden.
TABLE 26-4:
26.6
The LCDSEn registers are used to select the pin
function for each segment pin. The selection allows
each pin to operate as either an LCD segment driver or
as one of the pin’s alternate functions. To configure the
pin as a segment pin, the corresponding bits in the
LCDSEn registers must be set to ‘1’.
If the pin is a digital I/O, the corresponding TRIS bit
controls the data direction. Any bit set in the LCDSEn
registers overrides any bit settings in the corresponding
TRIS register.
26.7
The LCDDATAx registers contain bits which define the
state of each pixel. Each bit defines one unique pixel.
Register 26-6 shows the correlation of each bit in the
LCDDATAx registers to the respective common and
segment signals.
Any LCD pixel location not being used for display can
be used as general purpose RAM.
26.8
The rate at which the COM and SEG outputs change is
called the LCD frame frequency.
DS41364D-page 342
Multiplex
Note:
Static
1/2
1/3
1/4
LCD Multiplex Types
Segment Enables
Pixel Control
LCD Frame Frequency
On a Power-on Reset, these pins are
configured as normal I/O, not LCD pins.
LMUX
<1:0>
00
01
10
11
COMMON PIN USAGE
Unused
Unused
Unused
COM3
Active
Unused
Unused
COM2
Active
Active
Unused
COM1
Active
Active
Active
Preliminary
TABLE 26-5:
TABLE 26-6:
Multiplex
Note:
LP<3:0>
Static
1/2
1/3
1/4
2
3
4
5
6
7
Clock source is F
LFINTOSC.
Clock source/(4 x 1 x (LP<3:0> + 1))
Clock source/(2 x 2 x (LP<3:0> + 1))
Clock source/(1 x 3 x (LP<3:0> + 1))
Clock source/(1 x 4 x (LP<3:0> + 1))
Static
FRAME FREQUENCY
FORMULAS
APPROXIMATE FRAME
FREQUENCY (IN Hz) USING
F
32.768 kHz OR LFINTOSC
85
64
51
43
37
32
OSC
Frame Frequency =
2009 Microchip Technology Inc.
@ 8 MHz, TIMER1 @
1/2
85
64
51
43
37
32
OSC
/256, T1OSC or
114
1/3
85
68
57
49
43
1/4
85
64
51
43
37
32
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