PIC16F526-E/MG Microchip Technology, PIC16F526-E/MG Datasheet

1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, 8b ADC, 2x Compar

PIC16F526-E/MG

Manufacturer Part Number
PIC16F526-E/MG
Description
1.5KB Flash Program, 64B Flash Data, 8MHz Internal Oscillator, 8b ADC, 2x Compar
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16F526-E/MG

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
FLASH
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 3x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F526
Data Sheet
14-Pin, 8-Bit Flash Microcontroller
 2010 Microchip Technology Inc.
DS41326E

Related parts for PIC16F526-E/MG

PIC16F526-E/MG Summary of contents

Page 1

... Flash Microcontroller  2010 Microchip Technology Inc. PIC16F526 Data Sheet DS41326E ...

Page 2

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 3

... One comparator with programmable on-chip voltage reference (V • Analog-to-Digital (A/D) Converter: - 8-bit resolution - 3-channel external programmable inputs - 1-channel internal input to internal absolute 0.6 voltage reference Data Memory I/O Comparators Flash (bytes PIC16F526 ) REF ) REF 8-bit A/D Timers 8-bit Channels DS41326E-page 3 ...

Page 4

... PIC16F526 FIGURE 1-1: 14-PIN PDIP, SOIC, TSSOP DIAGRAM V DD RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V PP RC5/T0CKI RC4/C2OUT RC3 FIGURE 1-2: 16-PIN QFN DIAGRAM RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V RC5/T0CKI DS41326E-page RB0/C1IN+/AN0/ICSPDAT 2 13 RB1/C1IN-/AN1/ICSPCLK 3 12 RB2/C1OUT/AN2 RC0/C2IN RC1/C2IN RC2/CV REF RB0/C1IN+/AN0/ICSPDAT 11 RB1/C1IN-/AN1/ICSPCLK 2 10 ...

Page 5

... Table of Contents 1.0 General Description..................................................................................................................................................................... 7 2.0 PIC16F526 Device Varieties ...................................................................................................................................................... 9 3.0 Architectural Overview .............................................................................................................................................................. 11 4.0 Memory Organization ................................................................................................................................................................ 15 5.0 Flash Data Memory Control ...................................................................................................................................................... 23 6.0 I/O Port ...................................................................................................................................................................................... 27 7.0 Timer0 Module and TMR0 Register .......................................................................................................................................... 37 8.0 Special Features of the CPU..................................................................................................................................................... 43 9.0 Analog-to-Digital (A/D) Converter.............................................................................................................................................. 59 10.0 Comparator(s) ........................................................................................................................................................................... 63 11.0 Comparator Voltage Reference Module.................................................................................................................................... 69 12 ...

Page 6

... PIC16F526 NOTES: DS41326E-page 6  2010 Microchip Technology Inc. ...

Page 7

... In-Circuit Serial Programming Number of Instructions Packages The PIC16F526 device has Power-on Reset, selectable Watchdog Timer, selectable code-protect, high I/O current capability and precision internal oscillator. The PIC16F526 device uses serial programming with data pin RB0 and clock pin RB1.  2010 Microchip Technology Inc. ...

Page 8

... PIC16F526 NOTES: DS41326E-page 8  2010 Microchip Technology Inc. ...

Page 9

... PIC16F526 DEVICE VARIETIES A variety of packaging options are available. Depending on application and requirements, the proper device option can be selected using the information in this section. When placing orders, please use the PIC16F526 Identification System at the back of this data sheet to specify the correct part number. ...

Page 10

... PIC16F526 NOTES: DS41326E-page 10  2010 Microchip Technology Inc. ...

Page 11

... In addition, the learning curve is reduced significantly.  2010 Microchip Technology Inc. The PIC16F526 device contains an 8-bit ALU and working register. The ALU is a general purpose arith- metic unit. It performs arithmetic and Boolean functions between data in the working register and any register file ...

Page 12

... PIC16F526 FIGURE 3-1: PIC16F526 BLOCK DIAGRAM 11 Flash Program Memory Flash Data Memory 64x8 Program 12 Bus Instruction Reg 8 Instruction Decode and Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41326E-page 12 8 Data Bus Program Counter RAM 67 STACK1 bytes STACK2 File Registers (1) RAM Addr 9 Addr MUX ...

Page 13

... TABLE 3-2: PIC16F526 PINOUT DESCRIPTION Input Name Function Type RB0//C1IN+/AN0/ RB0 ICSPDAT C1IN+ AN0 ICSPDAT RB1/C1IN-/AN1/ RB1 ICSPCLK C1IN- AN1 ICSPCLK RB2/C1OUT/AN2 RB2 C1OUT AN2 RB3/MCLR/V RB3 PP MCLR V PP RB4/OSC2/CLKOUT RB4 OSC2 CLKOUT RB5/OSC1/CLKIN RB5 OSC1 XTAL CLKIN ...

Page 14

... PIC16F526 3.1 Clocking Scheme/Instruction Cycle The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks, namely Q1, Q2, Q3 and Q4. Internally, the PC is incremented every Q1 and the instruction is fetched from program memory and latched into the instruction register in Q4 decoded and executed during the following Q1 through Q4 ...

Page 15

... Register (FSR). 4.1 Program Memory Organization for the PIC16F526 The PIC16F526 device has an 11-bit Program Counter (PC) capable of addressing program memory space. Program memory is partitioned into user memory, data memory and configuration memory spaces. The user memory space is the on-chip user program memory ...

Page 16

... The Special Function Registers are registers used by the CPU and peripheral functions for controlling desired operations of the PIC16F526. See Figure 4-1 for details. The PIC16F526 register file is composed of 16 Special Function Registers and 67 General Purpose Registers. FIGURE 4-2: REGISTER FILE MAP FSR< ...

Page 17

... C1T0CS C1ON C1NREF ADCS1 ADCS0 CHS1 CHS0 C2POL C2PREF2 C2ON C2NREF VRR — VR3 VR2 — FREE WRERR WREN SELF READ/WRITE ADDRESS PIC16F526 Value on Bit 1 Bit 0 Power-on Page # Reset 27 --11 1111 1111 1111 19 22 xxxx xxxx 37 xxxx xxxx 21 1111 1111 0001 1xxx ...

Page 18

... PIC16F526 4.3 STATUS Register This register contains the arithmetic status of the ALU, the Reset status and the page preselect bit. The STATUS register can be the destination for any instruction, as with any other register. If the STATUS register is the destination for an instruction that affects the bits, then the write to these three bits is disabled ...

Page 19

... TRIS overrides Option control of RBPU and RBWU). W-1 W-1 (1) T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared (1) WDT Rate 128 256 1 : 128 PIC16F526 W-1 W-1 W-1 PS2 PS1 PS0 bit Bit is unknown DS41326E-page 19 ...

Page 20

... PIC16F526 4.5 OSCCAL Register The Oscillator Calibration (OSCCAL) register is used to calibrate the 8 MHz internal oscillator macro. It contains 7 bits of calibration that uses a two’s complement scheme for controlling the oscillator speed. See Register 4-3 for details. REGISTER 4-3: OSCCAL: OSCILLATOR CALIBRATION REGISTER ...

Page 21

... Stack The PIC16F526 device has a 2-deep, 12-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of Stack 1 into Stack 2 and then PUSH the current PC value, incre- mented by one, into Stack Level 1 ...

Page 22

... PIC16F526 4.8 Indirect Data Addressing: INDF and FSR Registers The INDF Register is not a physical register. Addressing INDF actually addresses the register whose address is contained in the FSR Register (FSR is a pointer). This is indirect addressing. Reading INDF itself indirectly (FSR = 0) will produce 00h. Writing to the INDF Register indirectly results in a no-operation (although Status bits may be affected) ...

Page 23

... WREN and WR bits can only be set using a series of BSF commands, as documented in Example 1. No other sequence of commands will work, no exceptions. 2: Bits <5:3> of the EEADR register indicate which row erased. PIC16F526 ERASING A FLASH DATA MEMORY ROW ; LOAD ADDRESS OF ROW TO ; ERASE ; ; SELECT ERASE ...

Page 24

... PIC16F526 5.2.2 WRITING TO FLASH DATA MEMORY Once a cell is erased, new data can be written. Program execution is suspended during the write cycle. The following sequence must be performed for a single byte write. 1. Load EEADR with the address. 2. Load EEDATA with the data to write. 3. Set the WREN bit to enable write access to the array ...

Page 25

... Flash data memory. Refer to the code protection chapter for more information.  2010 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 FREE WRERR WREN U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared PIC16F526 R/W-0 R/W bit Bit is unknown DS41326E-page 25 ...

Page 26

... PIC16F526 NOTES: DS41326E-page 26  2010 Microchip Technology Inc. ...

Page 27

... Reset. RB1 Weak Pull-up RB3 Weak Pull-up Yes Yes R/W-x R/W-x R/W-x RB4 RB3 RB2 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared PIC16F526 (1) RB4 Weak Pull-up Yes R/W-x R/W-x RB1 RB0 bit Bit is unknown DS41326E-page 27 ...

Page 28

... PIC16F526 REGISTER 6-2: PORTC: PORTC REGISTER U-0 U-0 R/W-x — — RC5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7-6 Unimplemented: Read as ‘0’ bit 5-0 RC<5:0>: PORTC I/O Pin bits 1 = Port pin is >V min. ...

Page 29

... TRIS must be cleared (= 0). For use as an input, the corresponding TRIS bit must be set. Any I/O pin (except RB3) can be programmed individually as input or output.  2010 Microchip Technology Inc. PIC16F526 FIGURE 6-1: BLOCK DIAGRAM OF RB0 AND RB1 (with Weak Pull- up and Wake-up on ...

Page 30

... PIC16F526 FIGURE 6-2: BLOCK DIAGRAM OF RB2 C1OUT 0 Data Bus Data WR Latch Port Q CK C1OUTEN W Reg D Q TRIS Latch TRIS ‘f’ Reset ADC Pin Enable RD Port ADC Note 1: I/O pins have protection diodes DS41326E-page 30 FIGURE 6-3: (1) I/O Pin GPPU RBPU MCLRE ...

Page 31

... TRIS ‘f’ CK I/O (1) pin OSC2 Note 1: I/O pins have protection diodes to V (Note Input mode is disabled when pin is used for oscillator and PIC16F526 BLOCK DIAGRAM OF RB5 Q Data I/O Latch (1) pin Q Q TRIS Latch Q Reset (Note 2) RD Port Oscillator Circuit and DD ...

Page 32

... PIC16F526 FIGURE 6-6: BLOCK DIAGRAM OF RC0/RC1 Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ Reset Comp Pin Enable RD Port COMP2 Note 1: I/O pins have protection diodes DS41326E-page 32 FIGURE 6-7: I/O (1) pin Data Bus D Q Data WR Latch ...

Page 33

... Microchip Technology Inc. FIGURE 6-9: C2OUT (1) I/O Pin Data Bus D Data WR Latch Port CK C2OUTEN W Reg D TRIS Latch TRIS ‘f’ CK Reset RD Port Note 1: I/O pins have protection diodes to V and PIC16F526 BLOCK DIAGRAM OF RC4 (1) 0 I/O Pin and DD DS41326E-page 33 ...

Page 34

... PIC16F526 FIGURE 6-10: BLOCK DIAGRAM OF RC5 Data Bus D Q Data WR Latch Port Reg D Q TRIS Latch TRIS ‘f’ T0CS Reset RD Port T0CKI Note 1: I/O pins have protection diodes DS41326E-page 34 (1) I/O Pin and DD  2010 Microchip Technology Inc. ...

Page 35

... RB1 RC5 RC4 RC3 RC2 RC1 RB3 RC0 RC1 RB3/MCLR C2IN+ C2IN- — TRISC TRISC — — — PIC16F526 Value on Value on Power-On All Other Reset Resets --11 1111 --11 1111 PS0 1111 1111 1111 1111 (1) C 0001 1xxx qq0q quuu RB0 --xx xxxx --uu uuuu ...

Page 36

... PIC16F526 6.5 I/O Programming Considerations 6.5.1 BIDIRECTIONAL I/O PORTS Some instructions operate internally as read followed by write operations. The BCF and BSF instructions, for example, read the entire port into the CPU, execute the bit operation and rewrite the result. Caution must be used when these instructions are applied to a port where one or more pins are used as input/outputs ...

Page 37

... Section 7.2 “Prescaler” details the operation of the prescaler. A summary of registers associated with the Timer0 module is found in Table 7- OUT 1 Sync with 1 Programmable 0 (2) Prescaler (2 cycle delay) (1) (1) PSA T0CS 3 (1) (1) (1) PS2 , PS1 , PS0 PIC16F526 Data Bus 8 TMR0 Reg Internal Clocks PS OUT Sync DS41326E-page 37 ...

Page 38

... PIC16F526 FIGURE 7-2: TIMER0 TIMING: INTERNAL CLOCK/NO PRESCALE (Program Counter) PC – Instruction MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W Fetch Timer0 Instruction Executed FIGURE 7-3: TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1 (Program PC – Counter) Instruction MOVWF TMR0 MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W ...

Page 39

... Timer0 module is actually incremented. Figure 7-4 shows the delay from the external clock edge to the timer incrementing ( (Duration OSC OSC max. OSC PIC16F526 Small pulse misses sampling Therefore, the error OSC DS41326E-page 39 ...

Page 40

... PIC16F526 7.2 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer (WDT), respectively (see Section 8.6 “Watch- dog Timer (WDT)”). For simplicity, this counter is being referred to as “prescaler” throughout this data sheet. Note: The prescaler may be used by either the Timer0 module or the WDT, but not both ...

Page 41

... Watchdog Timer (1) PSA WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register.  2010 Microchip Technology Inc Sync Cycles (1) T0CS (1) PSA 8-bit Prescaler 8 8-to-1 MUX PS<2:0> (1) MUX PSA WDT Time-out PIC16F526 Data Bus 8 TMR0 Reg 2 (1) DS41326E-page 41 ...

Page 42

... PIC16F526 NOTES: DS41326E-page 42  2010 Microchip Technology Inc. ...

Page 43

... A set of Configuration bits are used to select various options. 8.1 Configuration Bits The PIC16F526 Configuration Words consist of 12 bits. Configuration bits can be programmed to select various device configurations. Three bits are for the selection of the oscillator type; one bit is the Watchdog Timer enable bit, one bit is the MCLR enable bit and one bit is for code protection (Register 8-1) ...

Page 44

... EXTRC with RB4 function on RB4/OSC2/CLKOUT and 1 ms DRT 111 = EXTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1 ms DRT Note 1: Refer to the “PIC16F526 Memory Programming Specification”, DS41317 to determine how to access the Configuration Word. 2: DRT length ( ms function of Clock mode selection the responsibility of the application designer to ensure the use of either 18 ms (nominal) DRT or the 1 ms (nominal) DRT will result in acceptable operation. Refer to Section 14.1 “ ...

Page 45

... Oscillator Configurations 8.2.1 OSCILLATOR TYPES The PIC16F526 device can be operated six different oscillator modes. The user can program up to three Configuration bits (FOSC<2:0>). To select one of these modes: • LP: Low-Power Crystal • XT: Crystal/Resonator • HS: High-Speed Crystal/Resonator • INTRC: Internal 4/8 MHz Oscillator • ...

Page 46

... R and C components used. Figure 8-5 shows how the R/C combination is con- nected to the PIC16F526 device. For R below 3.0 k, the oscillator operation may become unstable, or stop completely. For very high R (e.g., 1 M), the oscillator becomes sensitive to noise, humidity and leakage ...

Page 47

... The calibration value must be read prior to erasing the part so it can be reprogrammed correctly later. For the PIC16F526 device, only bits 7:1 of OSCCAL are used for calibration. See Register 4-3 for more information. Note: The bit 0 of the OSCCAL register is unimplemented and should be written as ‘ ...

Page 48

... PIC16F526 8.3 Reset The device differentiates between various kinds of Reset: • Power-on Reset (POR) • MCLR Reset during normal operation • MCLR Reset during Sleep • WDT Time-out Reset during normal operation • WDT Time-out Reset during Sleep • Wake-up from Sleep on pin change ...

Page 49

... WDT Reset during Sleep WDT Reset normal operation Wake-up from Sleep on pin change Wake-up from Sleep on comparator change Legend unchanged unknown, – = unimplemented bit, read as ‘0’.  2010 Microchip Technology Inc. PIC16F526 STATUS Addr: 03h 0001 1xxx 000u uuuu 0001 0uuu 0000 0uuu ...

Page 50

... RBWU RB3/MCLR/V MCLRE 8.4 Power-on Reset (POR) The PIC16F526 device incorporates an on-chip Power- on Reset (POR) circuitry, which provides an internal chip Reset for most power-up situations. The on-chip POR circuit holds the chip in Reset until V has reached a high enough level for proper oper- DD ation ...

Page 51

... Internal Reset FIGURE 8-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset  2010 Microchip Technology Inc. POR (Power-on Reset) MCLR Reset Start-up Timer (10 ms, 1.125 ms) TDRT PIC16F526 CHIP Reset TDRT ): FAST V RISE DD DD DS41326E-page 51 ...

Page 52

... PIC16F526 FIGURE 8-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1  V DS41326E-page 52 V1 TDRT time-out expires long before V ...

Page 53

... Device Reset Timer (DRT) On the PIC16F526 device, the DRT runs any time the device is powered up. DRT runs from Reset and varies based on oscillator selection and Reset type (see Table 8-5). The DRT operates on an internal RC oscillator. The processor is kept in Reset as long as the DRT is active. ...

Page 54

... PIC16F526 FIGURE 8-11: WATCHDOG TIMER BLOCK DIAGRAM From Timer0 Clock Source (Figure 7-1) Watchdog Time WDT Enable Configuration Bit Note 1: PSA, PS<2:0> are bits in the OPTION register. TABLE 8-6: SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER Address Name Bit 7 Bit 6 N/A ...

Page 55

... The device should be reset in the event of a brown-out. To reset PIC16F526 devices when a brown-out occurs, external brown-out protection circuits may be built, as shown in Figure 8-12 and Figure 8-13.  2010 Microchip Technology Inc. ...

Page 56

... PIC16F526 8.9 Power-down Mode (Sleep) A device may be powered down (Sleep) and later powered up (wake-up from Sleep). 8.9.1 SLEEP The Power-Down mode is entered by executing a SLEEP instruction. If enabled, the Watchdog Timer will be cleared but keeps running, the TO bit of the STATUS register is set, the PD bit of the STATUS register is cleared and the oscillator driver is turned off ...

Page 57

... The first 64 locations and the last location (OSCCAL) can be read, regardless of the code protection bit setting. The last memory location can be read regardless of the code protection bit setting on the PIC16F526 device. 8.11 ID Locations Four memory locations are designated as ID locations where the user can store checksum or other code identification numbers ...

Page 58

... PIC16F526 NOTES: DS41326E-page 58  2010 Microchip Technology Inc. ...

Page 59

... The GO/DONE bit is cleared when the device enters Sleep, stopping the current conversion. The ADC does not have a dedicated oscillator, it runs off of the instruction clock. Therefore, no conversion can occur in sleep. The GO/DONE bit cannot be set when ADON is clear. PIC16F526 affect the signal being CHANNEL SELECT (ADCS) BITS AFTER AN EVENT ADCS< ...

Page 60

... PIC16F526 9.1.5 SLEEP This ADC does not have a dedicated ADC clock, and therefore, no conversion in Sleep is possible conversion is underway and a Sleep command is executed, the GO/DONE and ADON bit will be cleared. This will stop any conversion in process and power- down the ADC module to conserve power. Due to the nature of the conversion process, the ADRES may con- tain a partial conversion ...

Page 61

... The bits that were not converted before the GO/DONE was cleared are unrecoverable. R/W-1 R/W-1 R/W-1 ADCS0 CHS1 CHS0 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared (1), (2), (5) (3, 5) (4) PIC16F526 R/W-0 R/W-0 GO/DONE ADON bit Bit is unknown DS41326E-page 61 ...

Page 62

... PIC16F526 REGISTER 9-2: ADRES: A/D CONVERSION RESULTS REGISTER R/W-X R/W-X R/W-X ADRES7 ADRES6 ADRES5 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set EXAMPLE 9-1: PERFORMING AN ANALOG-TO-DIGITAL CONVERSION ;Sample code operates out of BANK0 MOVLW 0xF1 ;configure A/D MOVWF ADCON0 BSF ADCON0, 1 ...

Page 63

... When comparator is turned on, these control bits assert themselves. Otherwise, the other registers have precedence.  2010 Microchip Technology Inc. R/W-1 R/W-1 R/W-1 C1T0CS C1ON C1NREF U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared (1), (2) (2) (2) (2) (2) (2) PIC16F526 R/W-1 R/W-1 C1PREF C1WU bit Bit is unknown DS41326E-page 63 ...

Page 64

... PIC16F526 REGISTER 10-2: CM2CON0: COMPARATOR C2 CONTROL REGISTER R-1 R/W-1 R/W-1 C2OUT C2OUTEN C2POL bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 C2OUT: Comparator Output bit > < bit 6 C2OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C2OUT pin ...

Page 65

... V REF 0 (0.6V) C1NREF C2PREF1 C2IN C2PREF2 C2IN REF C2NREF C1WU C2WU  2010 Microchip Technology Inc C1POL C1ON 0 T0CKI 1 C1T0CS C2POL C2ON CWUF PIC16F526 RB2/C1OUT C1OUTEN C1OUT (Register) T0CKI Pin Q D READ S CM1CON0 RC4/C2OUT C2OUTEN C2OUT (Register READ S CM2CON0 DS41326E-page 65 ...

Page 66

... PIC16F526 10.1 Comparator Operation A single comparator is shown in Figure 10-2 along with the relationship between the analog input levels and the digital output. When the analog input at V than the analog input V -, the output of the comparator digital low level. The shaded area of the output of ...

Page 67

... Source Impedance = Analog Voltage Bit 4 Bit 3 Bit 2 Bit C1T0CS C1ON C1NREF C1PREF C2PREF2 C2ON C2NREF C2PREF1 PIC16F526 R IC Value on All Bit 0 Value on POR Other Resets C 0001 1xxx qq0q quuu C1WU q111 1111 quuu uuuu C2WU q111 1111 quuu uuuu --11 1111 --11 1111 ...

Page 68

... PIC16F526 NOTES: DS41326E-page 68  2010 Microchip Technology Inc. ...

Page 69

... R/W-0 — VR3 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared (1) = (VR<3:0>/24)* /4+(VR<3:0>/32)* pin is overridden and the analog voltage is placed on the REF PIC16F526 to V cannot be realized due from approaching The SS DD when VR<3:0> is ‘0000’ SS module current. REF derived and, therefore, ...

Page 70

... PIC16F526 FIGURE 11-1: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM 16-1 Analog VREN CV to REF Comparator 2 Input VR<3:0> RC2/CV REF V ROE TABLE 11-1: REGISTERS ASSOCIATED WITH COMPARATOR VOLTAGE REFERENCE Name Bit 7 Bit 6 Bit 5 VRCON VREN VROE VRR CM1CON0 C1OUT C1OUTEN C1POL CM2CON0 C2OUT ...

Page 71

... User defined term (font is courier)  2010 Microchip Technology Inc. PIC16F526 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...

Page 72

... PIC16F526 TABLE 12-2: INSTRUCTION SET SUMMARY Mnemonic, Description Operands ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW — Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 IORWF ...

Page 73

... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’.  2010 Microchip Technology Inc. PIC16F526 BCF Bit Clear f Syntax: [ label ] BCF f,b 0  ...

Page 74

... PIC16F526 BTFSS Bit Test f, Skip if Set Syntax: [ label ] BTFSS f,b 0  f  31 Operands: 0  b < 7 Operation: skip if (f<b> Status Affected: None Description: If bit ‘b’ in register ‘f’ is ‘1’, then the next instruction is skipped. If bit ‘b’ is ‘1’, then the next instruc- ...

Page 75

... Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS<6:5>. GOTO is a two- cycle instruction.  2010 Microchip Technology Inc. PIC16F526 INCF Increment f Syntax: [ label ] INCF f,d 0  f  31 Operands: d  ...

Page 76

... PIC16F526 IORWF Inclusive OR W with f Syntax: [ label ] IORWF f,d 0  f  31 Operands: d  [0,1] (W).OR. (f)  (dest) Operation: Status Affected: Z Description: Inclusive OR the W register with register ‘f’. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘ ...

Page 77

... Operands: Operation: Status Affected: C, DC, Z Description: SWAPF Syntax: Operands: Operation: Status Affected: None Description: PIC16F526 Enter SLEEP Mode [label ] SLEEP None 00h  WDT; 0  WDT prescaler; 1  TO; 0  PD Time-out Status bit (TO) is set. The Power-down Status bit (PD) is cleared ...

Page 78

... PIC16F526 TRIS Load TRIS Register Syntax: [ label ] TRIS f Operands (W)  TRIS register f Operation: Status Affected: None Description: TRIS register ‘f’ loaded with the contents of the W register XORLW Exclusive OR literal with W Syntax: [label ] XORLW k 0 k 255 Operands: (W) .XOR. k W) ...

Page 79

... Mixed C and assembly - Machine code MPLAB IDE supports multiple debugging tools in a single development paradigm, from the cost-effective simulators, through low-cost in-circuit debuggers, to full-featured emulators. This eliminates the learning curve when upgrading to tools with increased flexibility and power. PIC16F526 ® DS41326E-page 79 ...

Page 80

... PIC16F526 13.2 MPLAB C Compilers for Various Device Families The MPLAB C Compiler code development systems are complete ANSI C compilers for Microchip’s PIC18, PIC24 and PIC32 families of microcontrollers and the dsPIC30 and dsPIC33 families of digital signal control- lers. These compilers provide powerful integration capabilities, superior code optimization and ease of use ...

Page 81

... The PICkit 3 Debug Express include the PICkit 3, demo board and microcontroller, hookup cables and CDROM with user’s guide, lessons, tutorial, compiler and MPLAB IDE software. variable PIC16F526 ® Flash microcon- ® DSCs with the powerful, yet easy- ® ...

Page 82

... PIC16F526 13.11 PICkit 2 Development Programmer/Debugger and PICkit 2 Debug Express The PICkit™ 2 Development Programmer/Debugger is a low-cost development tool with an easy to use inter- face for programming and debugging Microchip’s Flash families of microcontrollers. The ® Windows programming interface supports baseline (PIC10F, PIC12F5xx, ...

Page 83

... –  DIS PIC16F526 + 0.3V  {( (V – ...

Page 84

... PIC16F526 PIC16F526 VOLTAGE-FREQUENCY GRAPH, -40C  T FIGURE 14-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 FIGURE 14-2: MAXIMUM OSCILLATOR FREQUENCY TABLE LP XT XTRC INTOSC 200 kHz DS41326E-page 84 INTOSC OR EC MODE ONLY 4 10 Frequency (MHz) 4 MHz 8 MHz Frequency  +125C ...

Page 85

... DC Characteristics: PIC16F526 (Industrial) DC Characteristics Param Sym. Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset D005 I Supply Current During Prog/ DDP Erase ( D010 I Supply Current ...

Page 86

... PIC16F526 14.2 DC Characteristics: PIC16F526 (Extended) DC Characteristics Param Sym. Characteristic No. D001 V Supply Voltage DD D002 V RAM Data Retention Voltage DR D003 V V Start Voltage to ensure POR DD Power-on Reset D004 S V Rise Rate to ensure VDD DD Power-on Reset D005 I Supply Current During Prog/ DDP Erase (3,4,6) ...

Page 87

... Data in “Typ” column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input not recommended that the PIC16F526 be driven with external clock in RC mode. 2: Negative current is defined as coming out of the pin. ...

Page 88

... PIC16F526 TABLE 14-2: COMPARATOR SPECIFICATIONS. Standard Operating Conditions (unless otherwise stated) Comparator Specifications Operating temperature Characteristics Sym. V Internal Voltage Reference IVRF V OS Input offset voltage Input common mode voltage CMRR* C MRR (1 Response Time Comparator Mode Change Output Valid* * These parameters are characterized but not tested. ...

Page 89

... PIC16F526 Units Conditions bit LSb V = 5.0V DD LSb No missing codes to 8 bits V = 5.0V DD LSb V = 5.0V DD LSb V = 5.0V DD  V  V — ...

Page 90

... PIC16F526 14.3 Timing Parameter Symbology and Load Conditions The timing parameter symbols have been created following one of the following formats: 1. TppS2ppS 2. TppS T F Frequency Lowercase subscripts (pp) and their meanings CLKOUT cy Cycle time drt Device Reset Timer io I/O port Uppercase letters and their meanings: ...

Page 91

... Microchip Technology Inc Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C  T -40C  T Operating Voltage V range is described in Section 14.1 “DC DD Characteristics: PIC16F526 (Industrial)” (1) Min. Typ. Max. Units (2) DC — 4 MHz XT Oscillator mode DC — 20 MHz HS/EC Oscillator mode DC — ...

Page 92

... DS41326E-page 92 Standard Operating Conditions (unless otherwise specified) -40C  T Operating Temperature -40C  T Operating Voltage V range is described in DD Section 14.1 “DC Characteristics: PIC16F526 (Industrial)” Freq. Min. Typ.† Max. Units Tolerance 1% 7.92 8.00 8 ...

Page 93

... See Figure 14-3 for loading conditions.  2010 Microchip Technology Inc 20, 21 -40C  T  +85C (industrial) A -40C  T  +125C (extended) A range is described in Section 14.1 “DC Characteristics: PIC16F526 DD Characteristic (2), (3) (2) (3) (3) PIC16F526 Q3 New Value (1) Min. Typ. Max. Units — ...

Page 94

... DS41326E-page Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C  T  +85C (industrial) A -40C  T  +125C (extended) A Operating Voltage V range is described in DD Section 14.1 “DC Characteristics: PIC16F526 (Industrial)” (1) Min. Typ. Max. Units 2000* — — 18* 30* ms ...

Page 95

... Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C  T  +85C (industrial) A -40C  T  +125C (extended) A Operating Voltage V range is described in DD Section 14.1 “DC Characteristics: PIC16F526 (Industrial)” Min. Typ. No Prescaler 0 20* CY With Prescaler 10* No Prescaler 0.5 T ...

Page 96

... DS41326E-page 96 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40C  T  +85C (industrial) A -40C  T  +125C (extended) A Operating Voltage V range is described in DD Section 14.1 “DC Characteristics: PIC16F526 (Industrial)” (1) Min. Typ. Max. Units 2 3 3.5 ...

Page 97

... FIGURE 15- Over OSC 3.00 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3 (-40°C to 125°C) 2.50 2.00 1.50 1.00 0.50 0.00 5  2010 Microchip Technology Inc. (HS Mode) DD Max. 2V Typical Fosc (MHz) PIC16F526 DD Max. 5V Typical DS41326E-page 97 ...

Page 98

... PIC16F526 FIGURE 15-2: TYPICAL I DD 800 Typical: Statistical Mean @25°C 700 Maximum: Mean (Worst-Case Temp) + 3 (-40°C to 125°C) 600 500 400 300 200 100 FIGURE 15-3: MAXIMUM I DD 800 Typical: Statistical Mean @25°C 700 Maximum: Mean (Worst-Case Temp) + 3 (-40°C to 125°C) ...

Page 99

... Typical: Statistical Mean @25°C Industrial: Mean (Worst-Case Temp) + 3σ (-40°C to 85°C) Extended: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 100  2010 Microchip Technology Inc. (LP MODE) OSC  32 kHz Maximum Extended 32 kHz Maximum Industrial (V) DD PIC16F526 32 kHz Typical 6 5 DS41326E-page 99 ...

Page 100

... PIC16F526 FIGURE 15-5: TYPICAL I vs 0.45 Typical: Statistical Mean @25°C 0.40 Maximum: Mean (Worst-Case Temp) + 3 (-40°C to 125°C) 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.0 2.0 2.5 FIGURE 15-6: MAXIMUM I PD 18.0 Typical: Statistical Mean @25°C 16.0 Maximum: Mean (Worst-Case Temp) + 3 ...

Page 101

... Microchip Technology Inc. vs 3.0 3.5 4.0 V (V) DD vs. V OVER TEMPERATURE PD DD Max. 125°C Max. 85°C 3.0 3.5 4.0 V (V) DD PIC16F526 4.5 5.0 5.5 4.5 5.0 5.5 DS41326E-page 101 ...

Page 102

... PIC16F526 FIGURE 15-9: COMPARATOR I 80 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3 (-40°C to 125° 2.0 2.5 FIGURE 15-10: WDT TIME-OUT vs Max. 125° Max. 85° Typical. 25° Min. -40° 2.0 2.5 DS41326E-page 102 vs. V (COMPARATOR ENABLED 3.0 3.5 4 ...

Page 103

... TO 125×C) Max. 125°C Typical 25°C Min. -40°C 6.5 7.0 7.5 8.0 8.5 I (mA 5.0V) DD Max. 125°C Max. 85°C Typ. 25°C Min. -40°C 6.5 7.0 7.5 8.0 8.5 I (mA) OL PIC16F526 Max. 85°C 9.0 9.5 10.0 9.0 9.5 10.0 DS41326E-page 103 ...

Page 104

... PIC16F526 FIGURE 15-13: V vs. I OVER TEMPERATURE ( 3.5 3.0 2.5 2.0 1.5 Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3 1.0 (-40°C to 125°C) 0.5 0.0 0.0 -0.5 -1.0 FIGURE 15-14: V vs. I OVER TEMPERATURE ( 5.5 5.0 4.5 4.0 Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3 ...

Page 105

... Input, -40×C TO 125×C) Max. -40°C Typ. 25°C Min. 125°C 3.0 3.5 4.0 V ( (ST Input, -40×C TO 125×C) 3.0 3.5 4.0 V (V) DD PIC16F526 4.5 5.0 5 Max. 125° Min. -40° Max. -40° Min. 125°C IL 4.5 5.0 5.5 ...

Page 106

... PIC16F526 FIGURE 15-17: DEVICE RESET TIMER (HS, XT AND LP) vs 2.0 2.5 Note: See Table 14-9 if another clock mode is selected. DS41326E-page 106 DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C Typical. 25°C Min. -40°C 3.0 3.5 4.0 V (V) DD 4.5 5 ...

Page 107

... NNN 16-Lead QFN XXX YYWW NNN TABLE 16-1: 16-LEAD 3X3 QFN (MG) TOP MARKING Part Number PIC16F526-I/MG PIC16F526-E/MG Legend: XX...X Customer-specific information Y Year code (last digit of calendar year) YY Year code (last 2 digits of calendar year) WW Week code (week of January 1 is week ‘01’) ...

Page 108

... PIC16F526 /HDG 3ODVWLF 'XDO ,Q/LQH 3 ±  PLO %RG\ >3',3@ 1RWH N NOTE 1RWHV DS41326E-page 108  2010 Microchip Technology Inc. ...

Page 109

... PP %RG\ >62,&@ 1RWH N NOTE 1RWHV  2010 Microchip Technology Inc φ PIC16F526 h α c β DS41326E-page 109 ...

Page 110

... PIC16F526 1RWH DS41326E-page 110  2010 Microchip Technology Inc. ...

Page 111

... PP %RG\ >76623@ 1RWH NOTE 1RWHV  2010 Microchip Technology Inc PIC16F526 φ L DS41326E-page 111 ...

Page 112

... PIC16F526 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS41326E-page 112  2010 Microchip Technology Inc. ...

Page 113

... Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2010 Microchip Technology Inc. PIC16F526 DS41326E-page 113 ...

Page 114

... PIC16F526 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS41326E-page 114  2010 Microchip Technology Inc. ...

Page 115

... Added Package Drawings and Package Marking Information for the 16-Lead Package Quad Flat, No Lead Package (MG) - 3x3x0.9 mm Body (QFN); Updated the Product Identification System section. Revision E (June 2010) Revised Section 6 (I/O) Figures 6-1, 6-4 and 6-6.  2010 Microchip Technology Inc. PIC16F526 DS41326E-page 115 ...

Page 116

... PIC16F526 NOTES: DS41326E-page 116  2010 Microchip Technology Inc. ...

Page 117

... Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com PIC16F526 should contact their distributor, DS41326E-page 117 ...

Page 118

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16F526 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

Page 119

... M Memory Organization.......................................................... 15 Memory Map ............................................................... 15 PIC16F526.................................................................. 15  2010 Microchip Technology Inc. PIC16F526 Program Memory (PIC16F526) .................................. 15 Microchip Internet Web Site.............................................. 115 MPLAB ASM30 Assembler, Linker, Librarian ..................... 80 MPLAB Integrated Development Environment Software.... 79 MPLAB PM3 Device Programmer ...................................... 82 MPLAB REAL ICE In-Circuit Emulator System .................. 81 MPLINK Object Linker/MPLIB Object Librarian .................. 80 O Option Register ...

Page 120

... PIC16F526 W Wake-up from Sleep ........................................................... 56 Watchdog Timer (WDT) ................................................ 43, 53 Period.......................................................................... 53 Programming Considerations ..................................... 53 WWW Address.................................................................. 115 WWW, On-Line Support........................................................ 5 Z Zero bit ................................................................................ 11 DS41326E-page 120  2010 Microchip Technology Inc. ...

Page 121

... MG = 16-Lead 3x3 (QFN) Pattern: Special Requirements  2010 Microchip Technology Inc. XXX Examples: Pattern a) PIC16F526-E/P 301 = Extended Temp., PDIP package, QTP pattern #301 b) PIC16F526-I/SL = Industrial Temp., SOIC package c) PIC16F526T-E/P = Extended Temp., PDIP package, Tape and Reel d) PIC16F526T-I/MG = Industrial Temp., QFN Package, Tape and Reel ...

Page 122

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350  2010 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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