PIC16LF1847-E/ML Microchip Technology, PIC16LF1847-E/ML Datasheet - Page 35
![14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan](/photos/40/79/407995/pdip18_sml.jpg)
PIC16LF1847-E/ML
Manufacturer Part Number
PIC16LF1847-E/ML
Description
14 KB Flash, 1K Bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced Mid Range Core, Nan
Manufacturer
Microchip Technology
Series
PIC® XLP™ mTouch™ 16Fr
Datasheet
1.PIC16F1847-EP.pdf
(408 pages)
Specifications of PIC16LF1847-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad
Core
PIC
Processor Series
PIC16LF
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
Number Of Programmable I/os
15
Number Of Timers
ÿ4 x 8-bit, 1 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
Through Hole
Interface Type
SPI, I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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TABLE 3-8:
2011 Microchip Technology Inc.
300h
301h
302h
303h
304h
305h
306h
307h
308h
309h
30Ah
30Bh
30Ch
30Dh
30Eh
30Fh
310h
311h
312h
313h
314h
315h
316h
317h
318h
319h
31Ah
31Bh
31Ch
31Dh
31Eh
31Fh
Legend:
Note
Address
Bank 6
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
1:
INDF0
INDF1
PCL
STATUS
FSR0L
FSR0H
FSR1L
FSR1H
BSR
WREG
PCLATH
INTCON
—
—
—
—
—
CCPR3L
CCPR3H
CCP3CON
—
—
—
—
CCPR4L
CCPR4H
CCP4CON
—
—
—
—
—
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
These registers can be addressed from any bank.
Name
Shaded locations are unimplemented, read as ‘0’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
Program Counter (PC) Least Significant Byte
Indirect Data Memory Address 0 Low Pointer
Indirect Data Memory Address 0 High Pointer
Indirect Data Memory Address 1 Low Pointer
Indirect Data Memory Address 1 High Pointer
Working Register
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Capture/Compare/PWM Register 3 (LSB)
Capture/Compare/PWM Register 3 (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Capture/Compare/PWM Register 4 (LSB)
Capture/Compare/PWM Register 4 (MSB)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Bit 7
GIE
—
—
—
—
—
Write Buffer for the upper 7 bits of the Program Counter
PEIE
Bit 6
—
—
—
—
TMR0IE
Bit 5
—
—
DC3B<1:0>
DC4B<1:0>
Preliminary
BSR4
Bit 4
INTE
TO
BSR3
IOCE
Bit 3
PD
TMR0IF
BSR2
Bit 2
CCP3M<3:0>
CCP4M<3:0>
Z
PIC16(L)F1847
BSR1
Bit 1
INTF
DC
BSR0
IOCF
Bit 0
C
DS41453B-page 35
xxxx xxxx xxxx xxxx
xxxx xxxx xxxx xxxx
0000 0000 0000 0000
---1 1000 ---q quuu
0000 0000 uuuu uuuu
0000 0000 0000 0000
0000 0000 uuuu uuuu
0000 0000 0000 0000
---0 0000 ---0 0000
0000 0000 uuuu uuuu
-000 0000 -000 0000
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --00 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --00 0000
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Value on
all other
Resets
—
—
—
—
—
—
—
—
—
—
—
—
—
—
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