PIC16LF1902-E/SP Microchip Technology, PIC16LF1902-E/SP Datasheet - Page 28
![3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SPDIP .300in TUBE](/photos/16/11/161110/pdip28_sml.jpg)
PIC16LF1902-E/SP
Manufacturer Part Number
PIC16LF1902-E/SP
Description
3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1902-EMV.pdf
(240 pages)
Specifications of PIC16LF1902-E/SP
Processor Series
PIC16LF190x
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
2 KB
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Package / Case
PDIP-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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PIC16LF1902/3
TABLE 3-5:
DS41455B-page 28
7ABh —
7ACh LCDDATA12
7ADh —
7AEh —
7AFh LCDDATA15
7B0h —
7B1h —
7B2h LCDDATA18
7B3h —
7B4h —
7B5h LCDDATA21
7B6h
7EFh
F8Ch
FE3h
FE4h STATUS_SHAD
FE5h WREG_SHAD
FE6h BSR_SHAD
FE7h PCLATH_SHAD
FE8h FSR0L_SHAD
FE9h FSR0H_SHAD
FEAh FSR1L_SHAD
FEBh FSR1H_SHAD
FECh —
FEDh STKPTR
FEEh TOSL
FEFh TOSH
Legend:
Note
Addr
x0Ch
x8Ch
x1Fh
x9Fh
Bank 15 (Continued)
—
—
Bank 16-30
or
to
or
Bank 31
—
—
—
1:
2:
Name
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
Unimplemented, read as ‘1’.
SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Working Register Normal (Non-ICD) Shadow
Indirect Data Memory Address 0 Low Pointer Normal (Non-ICD) Shadow
Indirect Data Memory Address 0 High Pointer Normal (Non-ICD) Shadow
Indirect Data Memory Address 1 Low Pointer Normal (Non-ICD) Shadow
Indirect Data Memory Address 1 High Pointer Normal (Non-ICD) Shadow
Unimplemented
Top of Stack Low byte
Bit 7
—
—
—
—
—
—
—
—
—
Program Counter Latch High Register Normal (Non-ICD) Shadow
Top of Stack High byte
Bit 6
—
—
—
—
—
—
—
Bit 5
—
—
—
—
—
—
—
Bank Select Register Normal (Non-ICD) Shadow
Current Stack Pointer
Preliminary
Bit 4
—
—
—
—
—
Bit 3
—
—
—
—
—
Z_SHAD
SEG26
SEG26
SEG26
SEG26
COM0
COM1
COM2
COM3
Bit 2
DC_SHAD C_SHAD ---- -xxx ---- -uuu
SEG25
SEG25
SEG25
SEG25
COM0
COM1
COM2
COM3
Bit 1
2011 Microchip Technology Inc.
SEG24
SEG24
SEG24
SEG24
COM0
COM1
COM2
COM3
Bit 0
---- -xxx ---- -uuu
---- -xxx ---- -uuu
---- -xxx ---- -uuu
---- -xxx ---- -uuu
xxxx xxxx uuuu uuuu
---x xxxx ---u uuuu
-xxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---1 1111 ---1 1111
xxxx xxxx uuuu uuuu
-xxx xxxx -uuu uuuu
POR, BOR
Value on
—
—
—
—
—
—
—
—
—
—
—
Value on all
Resets
other
—
—
—
—
—
—
—
—
—
—
—
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