PIC16LF1902-E/SS Microchip Technology, PIC16LF1902-E/SS Datasheet - Page 190
PIC16LF1902-E/SS
Manufacturer Part Number
PIC16LF1902-E/SS
Description
3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1902-EMV.pdf
(240 pages)
Specifications of PIC16LF1902-E/SS
Processor Series
PIC16LF190x
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
2 KB
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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PIC16LF1902/3
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41455B-page 190
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0 f 127
d [ 0 , 1 ]
(f) - 1 (destination);
skip if result = 0
None
The contents of register ‘f’ are decre-
mented. If ‘d’ is ‘ 0 ’, the result is placed
in the W register. If ‘d’ is ‘ 1 ’, the result
is placed back in register ‘f’.
If the result is ‘ 1 ’, the next instruction is
executed. If the result is ‘ 0 ’, then a
NOP is executed instead, making it a
2-cycle instruction.
Unconditional Branch
[ label ]
0 k 2047
k PC<10:0>
PCLATH<6:3> PC<14:11>
None
GOTO is an unconditional branch. The
eleven-bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH<4:3>.
GOTO is a two-cycle instruction.
Increment f
[ label ]
0 f 127
d [ 0 , 1 ]
(f) + 1 (destination)
Z
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘ 0 ’, the result is placed
in the W register. If ‘d’ is ‘ 1 ’, the result
is placed back in register ‘f’.
GOTO k
INCF f,d
Preliminary
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f, Skip if 0
[ label ]
0 f 127
d [ 0 , 1 ]
(f) + 1 (destination),
None
The contents of register ‘f’ are incre-
mented. If ‘d’ is ‘ 0 ’, the result is placed
in the W register. If ‘d’ is ‘ 1 ’, the result
is placed back in register ‘f’.
If the result is ‘ 1 ’, the next instruction is
executed. If the result is ‘ 0 ’, a NOP is
executed instead, making it a 2-cycle
instruction.
Inclusive OR W with f
[ label ]
0 f 127
d [ 0 , 1 ]
(W) .OR. (f) (destination)
Z
Inclusive OR the W register with regis-
ter ‘f’. If ‘d’ is ‘ 0 ’, the result is placed in
the W register. If ‘d’ is ‘ 1 ’, the result is
placed back in register ‘f’.
skip if result = 0
Inclusive OR literal with W
[ label ]
0 k 255
(W) .OR. k (W)
Z
The contents of the W register are
OR’ed with the eight-bit literal ‘k’. The
result is placed in the W register.
2011 Microchip Technology Inc.
INCFSZ f,d
IORWF
IORLW k
f,d
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