PIC16LF1902-E/SS Microchip Technology, PIC16LF1902-E/SS Datasheet - Page 20
![3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SSOP .209in TUBE](/photos/16/9/160971/ssop-28_sml.jpg)
PIC16LF1902-E/SS
Manufacturer Part Number
PIC16LF1902-E/SS
Description
3.5KB Flash, 128B RAM, LCD, 11x10b ADC, NanoWatt XLP 28 SSOP .209in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1902-EMV.pdf
(240 pages)
Specifications of PIC16LF1902-E/SS
Processor Series
PIC16LF190x
Core
PIC
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
2 KB
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SSOP-28
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
-
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
-
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
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PIC16LF1902/3
3.2.2
The Special Function Registers (SFRs) are registers
used by the application to control the desired operation
of peripheral functions in the device. The Special
Function Registers occupy the 20 bytes after the core
registers of every data memory bank (addresses
x0Ch/x8Ch
associated with the operation of the peripherals are
described in the appropriate peripheral chapter of this
data sheet.
3.2.3
There are up to 80 bytes of GPR in each data memory
bank. The Special Function Registers occupy the 20
bytes after the core registers of every data memory
bank (addresses x0Ch/x8Ch through x1Fh/x9Fh).
3.2.3.1
The general purpose RAM can be accessed in a
non-banked method via the FSRs. This can simplify
access to large memory structures. See
“Linear Data Memory”
3.2.4
There are 16 bytes of common RAM accessible from all
banks.
DS41455B-page 20
SPECIAL FUNCTION REGISTER
GENERAL PURPOSE RAM
COMMON RAM
Linear Access to GPR
through
x1Fh/x9Fh).
for more information.
The
Section 3.5.2
registers
Preliminary
FIGURE 3-3:
3.2.5
The
PIC16LF1903 are as shown in
7-bit Bank Offset
memory
DEVICE MEMORY MAPS
0Ch
0Bh
1Fh
6Fh
7Fh
00h
20h
70h
maps
Special Function Registers
BANKED MEMORY
PARTITIONING
General Purpose RAM
2011 Microchip Technology Inc.
(20 bytes maximum)
(80 bytes maximum)
Memory Region
Core Registers
Common RAM
for
(12 bytes)
(16 bytes)
Table
PIC16LF1902
3-3.
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