PIC16LF1906T-I/SS Microchip Technology, PIC16LF1906T-I/SS Datasheet - Page 100

• Manufacturer Part Number: PIC16LF1906T-I/SS
• Description: 14KB Flash, 512B RAM, LCD, 11x10b ADC, EUSART, NanoWatt XLP 28 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1906T-I/SS

• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Data Ram Size: 512 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 16-bit, 1 x 8-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Package / Case: QFN-28
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: LIN, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 14KB (8K x 14)
• Eeprom Size: -
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / Rohs Status: Details

PIC16LF1904/6/7
REGISTER 10-6:
TABLE 10-3:
TABLE 10-4:
DS41569A-page 100
PMCON1
PMCON2
PMADRL
PMADRH
PMDATL
PMDATH
INTCON
Legend:
CONFIG1
CONFIG2
Legend:
bit 7
Legend:
R = Readable bit
S = Bit can only be set
‘1’ = Bit is set
bit 7-0
Name
Name
W-0/0
— = unimplemented location, read as ‘ 0 ’. Shaded cells are not used by the Flash program memory module.
— = unimplemented location, read as ‘ 0 ’. Shaded cells are not used by the Flash program memory.
Bits
13:8
13:8
7:0
7:0
Bit 7
GIE
—
—
—
Flash Memory Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
PMCON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes.
SUMMARY OF REGISTERS ASSOCIATED WITH FLASH PROGRAM MEMORY
SUMMARY OF CONFIGURATION WORD WITH FLASH PROGRAM MEMORY
Bit -/7
W-0/0
CP
—
—
—
PMCON2: PROGRAM MEMORY CONTROL 2 REGISTER
CFGS
PEIE
Bit 6
—
MCLRE
Bit -/6
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
—
—
—
W-0/0
TMR0IE
LWLO
Bit 5
Program Memory Control Register 2
Bit 13/5
FCMEN
PWRTE
Program Memory Control Register 2
LVP
—
W-0/0
FREE
INTE
Bit 4
Preliminary
PMADRL<7:0>
PMDATL<7:0>
VCAPEN
Bit 12/4
DEBUG
IESO
PMADRH<6:0>
WDTE<1:0>
(1)
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
WRERR
IOCIE
Bit 3
W-0/0
PMDATH<5:0>
CLKOUTEN
Bit 11/3
—
—
TMR0IF
WREN
Bit 2
Bit 10/2
BORV
W-0/0
—
BOREN<1:0>
Bit 1
INTF
WR
FOSC<2:0>
STVREN
 2011 Microchip Technology Inc.
Bit 9/1
WRT<1:0>
W-0/0
IOCIF
Bit 0
RD
PLLEN
Bit 8/0
—
Register on
W-0/0
Page
Register
on Page
100
99
98
98
98
98
72
44
45
bit 0