PIC16LF723A-I/MV Microchip Technology, PIC16LF723A-I/MV Datasheet - Page 279
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PIC16LF723A-I/MV
Manufacturer Part Number
PIC16LF723A-I/MV
Description
7 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16F722AT-ISS.pdf
(284 pages)
Specifications of PIC16LF723A-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
T
T1CON Register ......................................................... 19, 112
T1GCON Register............................................................. 113
T2CON Register ................................................. 19, 116, 164
Thermal Considerations .................................................... 208
Time-out Sequence............................................................. 32
Timer0 ................................................................................. 99
Timer1 ............................................................................... 103
Timer2
Timers
Timing Diagrams
2010 Microchip Technology Inc.
TMR1ON Bit.............................................................. 113
Associated Registers ................................................ 101
Interrupt..................................................................... 101
Operation ............................................................ 99, 104
Specifications............................................................ 217
Associated registers.................................................. 114
Asynchronous Counter Mode ................................... 105
Interrupt..................................................................... 108
Modes of Operation .................................................. 104
Module On/Off (TMR1ON Bit)................................... 113
Operation During Sleep ............................................ 108
Oscillator ................................................................... 105
Prescaler................................................................... 105
Specifications............................................................ 217
Timer1 Gate
TMR1H Register ....................................................... 103
TMR1L Register........................................................ 103
Associated registers.................................................. 116
Timer1
Timer2
A/D Conversion......................................................... 219
A/D Conversion (Sleep Mode) .................................. 219
Asynchronous Reception .......................................... 140
Asynchronous Transmission..................................... 136
Asynchronous Transmission (Back-to-Back) ............ 136
Brown-out Reset (BOR) ............................................ 215
Brown-out Reset Situations ........................................ 31
CLKOUT and I/O....................................................... 213
Clock Synchronization .............................................. 173
Clock Timing ............................................................. 210
Enhanced Capture/Compare/PWM (ECCP) ............. 217
I
I
I
I
I
INT Pin Interrupt.......................................................... 38
Reset, WDT, OST and Power-up Timer ................... 214
Slave Select Synchronization ................................... 161
SPI Master Mode ...................................................... 158
SPI Master Mode (CKE = 1, SMP = 1) ..................... 221
SPI Mode (Slave Mode with CKE = 0) ...................... 160
SPI Mode (Slave Mode with CKE = 1) ...................... 160
SPI Slave Mode (CKE = 0) ....................................... 222
SPI Slave Mode (CKE = 1) ....................................... 222
Synchronous Reception (Master Mode, SREN) ....... 150
Synchronous Transmission....................................... 148
Synchronous Transmission (Through TXEN) ........... 148
2
2
2
2
2
C Bus Data ............................................................. 224
C Bus Start/Stop Bits.............................................. 223
C Reception (7-bit Address) ................................... 168
C Slave Mode with SEN = 0 (Reception,
C Transmission (7-bit Address).............................. 170
Reading and Writing ......................................... 105
Selecting Source............................................... 106
T1CON.............................................................. 112
T1GCON ........................................................... 113
T2CON.............................................................. 116
10-bit Address) ................................................. 169
PIC16F/LF722A/723A
Timing Parameter Symbology .......................................... 209
Timing Requirements
TMR0 Register.................................................................... 19
TMR1H Register ................................................................. 19
TMR1L Register.................................................................. 19
TMR2 Register.................................................................... 19
TMRO Register................................................................... 21
TRISA ................................................................................. 48
TRISA Register............................................................. 20, 48
TRISB ................................................................................. 56
TRISB Register............................................................. 20, 57
TRISC ................................................................................. 67
TRISC Register............................................................. 20, 67
TRISE ................................................................................. 74
TRISE Register............................................................. 20, 74
TXREG ............................................................................. 135
TXREG Register ................................................................. 19
TXSTA Register.......................................................... 20, 142
U
UA..................................................................................... 175
Update Address bit, UA .................................................... 175
USART
V
V
W
Wake-up Using Interrupts ................................................. 182
Watchdog Timer (WDT)...................................................... 29
WCOL bit .................................................................. 162, 174
WPUB Register................................................................... 57
Write Collision Detect bit (WCOL) ............................ 162, 174
WWW Address ................................................................. 281
WWW, On-Line Support ....................................................... 8
REF
Time-out Sequence
Timer0 and Timer1 External Clock ........................... 216
Timer1 Incrementing Edge ....................................... 108
USART Synchronous Receive (Master/Slave) ......... 220
USART Synchronous Transmission (Master/Slave). 220
Wake-up from Interrupt............................................. 182
I
I2C Bus Start/Stop Bits............................................. 224
SPI Mode.................................................................. 223
BRGH Bit .................................................................. 144
Synchronous Master Mode
. S
Clock Source .............................................................. 29
Period ......................................................................... 29
Specifications ........................................................... 216
2
C Bus Data............................................................. 225
EE
Case 1 ................................................................ 33
Case 2 ................................................................ 33
Case 3 ................................................................ 33
Requirements, Synchronous Receive .............. 220
Requirements, Synchronous Transmission...... 220
Timing Diagram, Synchronous Receive ........... 220
Timing Diagram, Synchronous Transmission... 220
ADC Reference Voltage
DS41417A-page 279