PIC18F1330-E/SO Microchip Technology, PIC18F1330-E/SO Datasheet - Page 100
PIC18F1330-E/SO
Manufacturer Part Number
PIC18F1330-E/SO
Description
Microcontroller
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1220-ISO.pdf
(36 pages)
4.PIC18F1230-ISO.pdf
(6 pages)
5.PIC18F1230-ISO.pdf
(12 pages)
6.PIC18F1230-ISO.pdf
(4 pages)
Specifications of PIC18F1330-E/SO
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-SOIC (7.5mm Width)
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
A/d Bit Size
10 bit
A/d Channels Available
4
Height
2.31 mm
Length
11.53 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.2 V
Width
7.49 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1220-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-ISO PDF datasheet #6
- Current page: 100 of 318
- Download datasheet (3Mb)
PIC18F1230/1330
11.3
The PIE registers contain the individual enable bits for
the peripheral interrupts. Due to the number of
peripheral interrupt sources, there are three Peripheral
Interrupt Enable registers (PIE1, PIE2 and PIE3). When
IPEN = 0, the PEIE bit must be set to enable any of
these peripheral interrupts.
REGISTER 11-7:
DS39758D-page 100
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
PIE Registers
Unimplemented: Read as ‘0’
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
RCIE: EUSART Receive Interrupt Enable bit
1 = Enables the EUSART receive interrupt
0 = Disables the EUSART receive interrupt
TXIE: EUSART Transmit Interrupt Enable bit
1 = Enables the EUSART transmit interrupt
0 = Disables the EUSART transmit interrupt
CMP2IE: Analog Comparator 2 Interrupt Enable bit
1 = Enables the CMP2 interrupt
0 = Disables the CMP2 interrupt
CMP1IE: Analog Comparator 1 Interrupt Enable bit
1 = Enables the CMP1 interrupt
0 = Disables the CMP1 interrupt
CMP0IE: Analog Comparator 0 Interrupt Enable bit
1 = Enables the CMP0 interrupt
0 = Disables the CMP0 interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
R/W-0
ADIE
PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1
W = Writable bit
‘1’ = Bit is set
RCIE
R-0
TXIE
R-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CMP2IE
R/W-0
CMP1IE
R/W-0
2009 Microchip Technology Inc.
x = Bit is unknown
CMP0IE
R/W-0
TMR1IE
R/W-0
bit 0
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