PIC18F23K22-I/SO Microchip Technology, PIC18F23K22-I/SO Datasheet - Page 207

• Manufacturer Part Number: PIC18F23K22-I/SO
• Description: 8KB, Flash, 768bytes-RAM,8-bit Family 28 SOIC .300in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F23K22-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Processor Series: PIC18F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.0
15.1
The Master Synchronous Serial Port (MSSPx) module
is a serial interface useful for communicating with other
peripheral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers,
display drivers, A/D converters, etc. The MSSPx
module can operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
FIGURE 15-1:
 2010 Microchip Technology Inc.
MASTER SYNCHRONOUS
SERIAL PORT (MSSP1 AND
MSSP2) MODULE
Master SSPx (MSSPx) Module
Overview
MSSPx BLOCK DIAGRAM (SPI MODE)
2
C™)
SCKx
SDOx
SDIx
SSx
Read
SSx Control
TRIS bit
bit 0
Enable
Select
Select
Edge
Edge
Preliminary
SSPxBUF Reg
SSPxSR Reg
SSPxM<3:0>
4
The SPI interface supports the following modes and
features:
• Master mode
• Slave mode
• Clock Parity
• Slave Select Synchronization (Slave mode only)
• Daisy chain connection of slave devices
Figure 15-1
module.
Clock
Shift
Write
PIC18(L)F2X/4XK22
(
Prescaler
Data Bus
4, 16, 64
TMR2 Output
Baud Rate
Generator
(SSPxADD)
2 (CKP, CKE)
2
Clock Select
is a block diagram of the SPI interface
T
OSC
)
DS41412D-page 207