PIC18F25K80T-I/SO Microchip Technology, PIC18F25K80T-I/SO Datasheet - Page 187
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PIC18F25K80T-I/SO
Manufacturer Part Number
PIC18F25K80T-I/SO
Description
ECAN, 32KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 28 SOIC .300in T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F25K80T-I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F25K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
24
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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11.4
PORTC is an eight-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch registers
are TRISC and LATC. Only PORTC pins, RC2 through
RC7, are digital only pins.
PORTC is multiplexed with CCP, MSSP and EUSART
peripheral functions
Schmitt Trigger input buffers. The pins for CCP, SPI
and EUSART are also configurable for open-drain out-
put whenever these functions are active. Open-drain
configuration is selected by setting the SSPOD,
CCPxOD and U1OD control bits in the ODCON
register.
RC1 is configurable for open-drain output when CCP2
is active on this pin. Open-drain configuration is
selected
(ODCON<3>).
2011 Microchip Technology Inc.
PORTC, TRISC and
LATC Registers
by
setting
(Table
the
11-5). The pins have
CCP2OD
control
Preliminary
bit
PIC18F66K80 FAMILY
When enabling peripheral functions, use care in defin-
ing TRIS bits for each PORTC pin. Some peripherals
can override the TRIS bit to make a pin an output or
input. Consult the corresponding peripheral section for
the correct TRIS bit settings.
The contents of the TRISC register are affected by
peripheral overrides. Reading TRISC always returns
the current contents, even though a peripheral device
may be overriding one or more of the pins.
EXAMPLE 11-3:
CLRF
CLRF
MOVLW
MOVWF
Note:
PORTC
LATC
0CFh
TRISC
These pins are configured as digital inputs
on any device Reset.
; Initialize PORTC by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Value used to
; initialize data
; direction
; Set RC<3:0> as inputs
; RC<5:4> as outputs
; RC<7:6> as inputs
INITIALIZING PORTC
DS39977C-page 187
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