PIC18F44K20-E/MV Microchip Technology, PIC18F44K20-E/MV Datasheet - Page 141
![16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU](/photos/16/15/161538/qfn-40_sml.jpg)
PIC18F44K20-E/MV
Manufacturer Part Number
PIC18F44K20-E/MV
Description
16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K20T-ISS.pdf
(456 pages)
Specifications of PIC18F44K20-E/MV
Processor Series
PIC18
Core
PIC18F
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
8 KB
Data Ram Size
512 B
Interface Type
I2C, SPI, SCI, USB, MSSP, RJ11
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB Integrated Development Environment
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Supply Current (max)
30 uA
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
Details
- Current page: 141 of 456
- Download datasheet (4Mb)
TABLE 10-11: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
2010 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTE
LATE
TRISE
SLRCON
INTCON
PIR1
PIE1
IPR1
ANSEL
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Note 1:
Name
(1)
(1)
(1)
(1)
(1)
Unimplemented on PIC18F2XK20 devices.
PORTD Data Latch Register (Read and Write to Data Latch)
PORTD Data Direction Control Register
GIE/GIEH PEIE/GIEL
PSPIF
PSPIE
PSPIP
ANS7
Bit 7
RD7
IBF
—
—
—
(1)
(1)
(1)
(1)
ANS6
ADIF
ADIE
ADIP
Bit 6
RD6
OBF
—
—
—
(1)
TMR0IE
ANS5
IBOV
RCIE
RCIP
RCIF
Bit 5
RD5
—
—
—
(1)
PSPMODE
SLRE
INT0IE
ANS4
TXIE
TXIP
Bit 4
TXIF
RD4
—
—
(1)
SLRD
SSPIF
SSPIE
SSPIP
ANS3
PIC18F2XK20/4XK20
RBIE
Bit 3
RD3
RE3
—
—
(1)
LATE Data Output bits
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISE2
RE2
SLRC
ANS2
Bit 2
RD2
(1)
TMR2IE
TMR2IP
TMR2IF
TRISE1
INT0IF
RE1
SLRB
ANS1
Bit 1
RD1
(1)
TMR1IF
TMR1IE
TMR1IP
TRISE0
RE0
SLRA
ANS0
DS41303G-page 141
RBIF
Bit 0
RD0
(1)
on page
Values
Reset
62
62
62
62
62
62
63
59
62
62
62
62
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