PIC18F4553-I/ML Microchip Technology, PIC18F4553-I/ML Datasheet - Page 36

• Manufacturer Part Number: PIC18F4553-I/ML
• Description: 32 KB Flash, 2048 RAM, FS-USB 2.0, 12-bit ADC 44 QFN 8x8x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4553-I/ML

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFN
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: MSSP, I2C, SPI, EUSART, CCP, ECCP
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163025
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFNDM163025 - PIC DEM FULL SPEED USB DEMO BRD444-1001 - DEMO BOARD FOR PICMICRO MCU
• Lead Free Status / Rohs Status: Details

PIC18F2458/2553/4458/4553
FIGURE 4-3:
TABLE 4-2:
DS39887C-page 36
130
131
132
135
137
Note 1:
Param
No.
Note 1:
A/D CLK
A/D DATA
SAMPLE
2:
3:
4:
ADRES
BSF ADCON0, GO
T
T
T
T
T
Symbol
ADIF
AD
CNV
ACQ
SWC
DIS
2:
GO
Q4
The time of the A/D clock period is dependent on the device frequency and the T
ADRES registers may be read on the following T
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
On the following cycle of the device clock.
(1)
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
132
A/D CONVERSION REQUIREMENTS
A/D Clock Period
Conversion Time
(not including acquisition time)
Acquisition Time
Switching Time from Convert → Sample
Discharge Time
A/D CONVERSION TIMING
(Note 2)
Characteristic
DD
11
(3)
to V
10
SS
PIC18FXXXX
PIC18LFXXXX
PIC18FXXXX
PIC18LFXXXX
or V
OLD_DATA
9
SS
(2)
to V
. . .
SAMPLING STOPPED
CY
DD
is added before the A/D clock starts.
). The source impedance (R
CY
. . .
130
131
cycle.
Min
0.8
1.4
1.4
0.2
13
—
—
—
3
(Note 4)
12.5
25.0
Max
14
—
—
1
3
2
(1)
(1)
Units
1
T
μs
μs
μs
μs
μs
μs
AD
S
© 2009 Microchip Technology Inc.
) on the input channels is 50Ω.
T
V
T
A/D RC mode
V
0
OSC
OSC
DD
DD
AD
= 3.0V;
= 3.0V; A/D RC mode
based, V
based, V
clock divider.
NEW_DATA
DONE
Conditions
T
CY
REF
REF
≥ 3.0V
full range