PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 141

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 10-5:
TABLE 10-6:
 2010 Microchip Technology Inc.
RB6/KBI2/PGC
RB7/KBI3/PGD
Legend:
Note 1:
ANSELB
ECCP2AS
CCP2CON
ECCP3AS
CCP3CON
INTCON
INTCON2
INTCON3
IOCB
LATB
PORTB
SLRCON
T1GCON
T3CON
T5GCON
TRISB
WPUB
Legend:
Note 1:
Name
2:
3:
Pin
AN = Analog input or output; TTL = TTL compatible input; HV = High Voltage; OD = Open Drain; XTAL = Crystal; CMOS =
CMOS compatible input or output; ST = Schmitt Trigger input with CMOS levels; I
Default pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are set.
Alternate pin assignment for P2B, T3CKI, CCP3 and CCP2 when Configuration bits PB2MX, T3CMX, CCP3MX and
CCP2MX are clear.
Function on PORTD and PORTE for PIC18(L)F4XK22 devices.
— = unimplemented locations, read as ‘0’. Shaded bits are not used for PORTB.
Available on PIC18(L)F4XK22 devices.
CCP2ASE
CCP3ASE
GIE/GIEH PEIE/GIEL
TMR1GE
TMR5GE
TRISB7
WPUB7
INT2IP
IOCB7
LATB7
RBPU
Bit 7
RB7
—
—
TMR3CS<1:0>
PORTB I/O SUMMARY (CONTINUED)
REGISTERS ASSOCIATED WITH PORTB
P2M<1:0>
P3M<1:0>
RX2
Function
DT2
CK2
TX2
IOC2
IOC3
PGC
PGD
RB6
RB7
(2), (3)
(2), (3)
INTEDG0
(3)
(3)
T1GPOL
T5GPOL
WPUB6
TRISB6
INT1IP
IOCB6
LATB6
Bit 6
RB6
—
—
Setting
TRIS
0
1
1
1
1
1
x
0
1
1
1
1
1
x
x
CCP3AS<2:0>
CCP2AS<2:0>
INTEDG1
TMR0IE
TRISB5
WPUB5
T1GTM
T5GTM
ANSB5
IOCB5
LATB5
Bit 5
RB5
ANSEL
Setting
—
—
T3CKPS<1:0>
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DC2B<1:0>
DC3B<1:0>
INTEDG2
T1GSPM
T5GSPM
Type
SLRE
WPUB4
TRISB4
ANSB4
Pin
INT0IE
INT2IE
IOCB4
LATB4
Preliminary
O
O
O
O
O
O
Bit 4
I
I
I
I
I
I
I
I
I
RB4
(1)
Buffer
Type
DIG
TTL
DIG
DIG
DIG
TTL
DIG
DIG
ST
ST
ST
ST
ST
ST
ST
T5GGO_DONE
T1GGO/DONE
T3SOSCEN
SLRD
TRISB3
WPUB3
ANSB3
LATB<6> data output; not affected by analog input.
PORTB<6> data input; disabled when analog input
enabled.
Interrupt-on-change pin.
EUSART 2 asynchronous transmit data output.
EUSART 2 synchronous serial clock output.
EUSART 2 synchronous serial clock input.
In-Circuit Debugger and ICSP
LATB<7> data output; not affected by analog input.
PORTB<7> data input; disabled when analog input
enabled.
Interrupt-on-change pin.
EUSART 2 asynchronous receive data input.
EUSART 2 synchronous serial data output.
EUSART 2 synchronous serial data input.
In-Circuit Debugger and ICSP
In-Circuit Debugger and ICSP
INT1IE
LATB3
RBIE
Bit 3
RB3
PSS2AC<1:0>
PSS3AC<1:0>
PIC18(L)F2X/4XK22
—
—
(1)
CCP2M<3:0>
CCP3M<3:0>
T3SYNC
TMR0IP
T1GVAL
T5GVAL
TMR0IF
TRISB2
WPUB2
ANSB2
LATB2
SLRC
Bit 2
RB2
—
—
2
C
TM
Description
=
T3RD16
WPUB1
TRISB1
ANSB1
INT0IF
INT2IF
LATB1
Schmitt Trigger input with I
SLRB
Bit 1
RB1
PSS2BD<1:0>
PSS3BD<1:0>
—
—
T1GSS<1:0>
TM
TM
TM
T5GSS
programming clock input.
programming data output.
programming data input.
TMR3ON
WPUB0
TRISB0
DS41412D-page 141
ANSB0
INT1IF
LATB0
SLRA
RBIP
Bit 0
RBIF
RB0
—
Register
on Page
153
201
201
156
155
151
156
171
170
171
154
155
205
205
115
116
117
2
C.