PIC18F46K80-E/P Microchip Technology, PIC18F46K80-E/P Datasheet - Page 224
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 40 PDIP .600in TUBE](/photos/16/3/160374/pdip40_sml.jpg)
PIC18F46K80-E/P
Manufacturer Part Number
PIC18F46K80-E/P
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 40 PDIP .600in TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F46K80-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F46K80-E/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC18F66K80 FAMILY
14.8.3
When Timer1 Gate Toggle mode is enabled, it is
possible to measure the full cycle length of a Timer1
gate signal, as opposed to the duration of a single level
pulse.
The Timer1 gate source is routed through a flip-flop that
changes state on every incrementing edge of the
signal. (For timing details, see
FIGURE 14-5:
DS39977C-page 224
TMR1GE
T1GPOL
T1GVAL
T1G_IN
T1GTM
Timer1
T1CKI
TIMER1 GATE TOGGLE MODE
N
TIMER1 GATE TOGGLE MODE
Figure
14-5.)
N + 1 N + 2 N + 3
Preliminary
The T1GVAL bit (T1GCON<2>) indicates when the
Toggled mode is active and the timer is counting.
The Timer1 Gate Toggle mode is enabled by setting the
T1GTM bit (T1GCON<5>). When T1GTM is cleared,
the flip-flop is cleared and held clear. This is necessary
in order to control which edge is measured.
N + 4
N + 5 N + 6 N + 7
2011 Microchip Technology Inc.
N + 8
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