PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 434
![ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R](/photos/39/70/397090/qfn-44_sml.jpg)
PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F66K80 FAMILY
27.2.4
This section describes the CAN Baud Rate registers.
REGISTER 27-52: BRGCON1: BAUD RATE CONTROL REGISTER 1
DS39977C-page 434
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note:
R/W-0
SJW1
CAN BAUD RATE REGISTERS
These
Configuration mode only.
SJW<1:0>: Synchronized Jump Width bits
11 = Synchronization jump width time = 4 x T
10 = Synchronization jump width time = 3 x T
01 = Synchronization jump width time = 2 x T
00 = Synchronization jump width time = 1 x T
BRP<5:0>: Baud Rate Prescaler bits
111111 = T
111110 = T
000001 = T
000000 = T
R/W-0
SJW0
registers
:
:
Q
Q
Q
Q
= (2 x 64)/F
= (2 x 63)/F
= (2 x 2)/F
= (2 x 1)/F
W = Writable bit
‘1’ = Bit is set
are
R/W-0
BRP5
writable
OSC
OSC
OSC
OSC
R/W-0
BRP4
Preliminary
in
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
Q
Q
Q
Q
R/W-0
BRP3
R/W-0
BRP2
2011 Microchip Technology Inc.
x = Bit is unknown
R/W-0
BRP1
R/W-0
BRP0
bit 0
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