PIC18F46K80T-I/ML Microchip Technology, PIC18F46K80T-I/ML Datasheet - Page 580
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PIC18F46K80T-I/ML
Manufacturer Part Number
PIC18F46K80T-I/ML
Description
ECAN, 64KB Flash, 4KB RAM, 16 MIPS, 12-bit ADC, CTMU 44 QFN 8x8x0.9mm T/R
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F46K80T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
PIC18F46K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F66K80 FAMILY
FIGURE 31-13:
TABLE 31-17: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
DS39977C-page 580
70
70A
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
Note:
SSx
SCKx
(CKPx = 0 )
SCKx
(CKP = 1 )
SDOx
SDIx
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SC
SC
Symbol
DI
DI
B
DO
DO
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
2
V2
V2
H2
L2
H2
L2
L2
L2
L2WB SSx to write to SSPBUF
H
L
H2
L2
H2
R
F
B
R
F
Refer to
SC
SC
DO
SS
SC
SC
DI
DO
SS
DI
DO
L
H
L,
H,
L
V
H,
L
H,
V,
Z SSx to SDOx Output High-impedance
SSx to SCKx or SCKx Input
SCKx Input High Time
(Slave mode)
SCKx Input Low Time
(Slave mode)
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SCKx Output Rise Time (Master mode)
SCKx Output Fall Time (Master mode)
SDOx Data Output Valid after SCKx Edge
SSx after SCKx Edge
Figure 31-3
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
80
71
for load conditions.
73
MSb In
MSb
Characteristic
74
72
75, 76
Preliminary
bit 6 - - - - - - 1
bit 6 - - - - 1
Continuous
Single Byte
Continuous
Single Byte
78
79
1.25 T
1.25 T
1.5 T
79
78
LSb In
3 T
3 T
Min
LSb
CY
CY
40
40
20
40
10
—
—
—
—
—
CY
CY
83
CY
CY
+ 40
+ 40
+ 30
+ 30
2011 Microchip Technology Inc.
77
Max Units Conditions
25
25
50
25
25
50
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
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