PIC18F64J11T-I/PT Microchip Technology, PIC18F64J11T-I/PT Datasheet - Page 32

• Manufacturer Part Number: PIC18F64J11T-I/PT
• Description: 16KB, Flash, 1024bytes-RAM, 51I/O, 8-bit Family,nanoWatt 64 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F64J11T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180018 - MODULE PLUG-IN 18F85J11AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F64J11T-I/PTTR

PIC18F6XJXX/8XJXX
6.0
DS39644L-page 32
Standard Operating Conditions
Operating Temperature: 25C is recommended
Param
D111
D112
D113
D031
D041
D080
D090
D012
P2
P2A
P2B
P3
P4
P5
P5A
P6
P9
P10
P11
Note 1:
No.
2:
V
V
I
I
V
V
V
V
C
C
T
T
T
T
T
T
T
T
T
T
T
Symbol
PP
DDP
AC/DC CHARACTERISTICS AND TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE
DLY
PGC
PGCL
PGCH
SET
HLD
DLY
DLY
DLY
DLY
DLY
DDCORE
DD
IL
IH
OL
OH
IO
F
V
Section 2.1.1 “On-Chip Voltage Regulator” for more information.
V
regulator is used. AV
1
1
1
1
2
5
6
7
DDCORE
DD
A
must also be supplied to the AV
External Supply Voltage for Microcontroller
Core
Supply Voltage During
Programming
Programming Current on MCLR
Supply Current During Programming
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Capacitive Loading on I/O pin (PGD)
Filter Capacitor Value on V
Serial Clock (PGC) Period
Serial Clock (PGC) Low Time
Serial Clock (PGC) High Time
Input Data Setup Time to Serial Clock 
Input Data Hold Time from PGC
Delay between 4-Bit Command and
Command Operand
Delay between 4-Bit Command Operand and
Next 4-Bit Command
Delay between Last PGC  of Command
Byte to First PGC  of Read of Data Word
Delay to Allow Block Programming to Occur
Delay to Allow Row Erase to Occur
Delay to allow Bulk Erase to Occur
must be supplied to the V
DD
Characteristic
and AV
SS
CAP
should always be within ±0.3V of V
DDCORE
ENVREG = V
ENVREG = V
DD
pins during programming and to the ENVREG pin if the on-chip voltage
/V
CAP
SS
DD
pin if the on-chip voltage regulator is disabled. See
V
0.8 V
DDCORE
2.65
Min
V
100
475
2.3
2.4
4.7
3.4
1.2
40
40
15
15
40
40
20
49
—
—
—
—
SS
DD
0.2 V
Max
2.70
3.60
3.60
V
0.4
10
50
10
—
—
—
—
—
—
—
—
—
—
—
—
—
5
DD
DD
DD
and V
Units
mA
ms
ms
ms
ms
A
pF
F
ns
ns
ns
ns
ns
ns
ns
ns
V
V
V
V
V
V
SS
 2009 Microchip Technology Inc.
, respectively.
(Note 1)
Normal programming (Note 2)
I
I
To meet AC specifications
Required for controller core
operation when voltage
regulator is enabled
For PIC18F87J10,
PIC18F85J90 and
PIC18F85J11 family parts
For PIC18F87J50,
PIC18F87J11, PIC18F87J90,
PIC18F87J93 and
PIC18F87J72 family parts
OL
OH
= 8.5 mA @ 3.3V
= -6.0 mA @ 3.3V
Conditions