PIC18F65J50T-I/PT Microchip Technology, PIC18F65J50T-I/PT Datasheet - Page 212
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J50T-I/PT
Manufacturer Part Number
PIC18F65J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F65J50-IPT.pdf
(480 pages)
4.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F65J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
49
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F65J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F65J50-IPT PDF datasheet #3
- PIC18F65J50-IPT PDF datasheet #4
- Current page: 212 of 480
- Download datasheet (8Mb)
PIC18F87J50 FAMILY
17.3
In Compare mode, the 16-bit CCPRx register value is
constantly compared against either the TMR1 or TMR3
register pair value. When a match occurs, the CCPx pin
can be:
• driven high
• driven low
• toggled (high-to-low or low-to-high)
• remains unchanged (that is, reflects the state of
The action on the pin is based on the value of the mode
select bits (CCPxM3:CCPxM0). At the same time, the
interrupt flag bit, CCPxIF, is set.
17.3.1
The user must configure the CCPx pin as an output by
clearing the appropriate TRIS bit.
FIGURE 17-3:
DS39775C-page 212
the I/O latch)
Compare Mode
CCPx PIN CONFIGURATION
0
1
COMPARE MODE OPERATION BLOCK DIAGRAM
CCPR5H
CCPR4H
TMR1H
TMR3H
T3CCP1
Comparator
Comparator
CCPR5L
CCPR4L
TMR1L
TMR3L
Compare
Compare
Match
Match
0
1
Set CCP4IF
T3CCP2
Set CCP5IF
17.3.2
Timer1 and/or Timer3 must be running in Timer mode
or Synchronized Counter mode if the CCPx module is
using the compare feature. In Asynchronous Counter
mode, the compare operation may not work.
17.3.3
When the Generate Software Interrupt mode is chosen
(CCPxM3:CCPxM0 = 1010), the corresponding CCPx
pin is not affected. Only a CCP interrupt is generated,
if enabled and the CCPxIE bit is set.
Note:
CCP4CON<3:0>
CCP5CON<3:0>
Output
Output
Logic
4
Logic
4
Clearing the CCP5CON register will force
the RG4 compare output latch (depend-
ing on device configuration) to the default
low level. This is not the PORTB or
PORTC I/O data latch.
TIMER1/TIMER3 MODE SELECTION
SOFTWARE INTERRUPT MODE
S
R
S
R
Q
Q
© 2009 Microchip Technology Inc.
Output Enable
Output Enable
TRIS
TRIS
CCP4 pin
CCP5 pin
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