PIC18F65J50T-I/PT Microchip Technology, PIC18F65J50T-I/PT Datasheet - Page 449
![IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F65J50T-I/PT
Manufacturer Part Number
PIC18F65J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F63J11-IPT.pdf
(36 pages)
3.PIC18F65J50-IPT.pdf
(480 pages)
4.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F65J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
49
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F65J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F65J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC18F63J11-IPT PDF datasheet #2
- PIC18F65J50-IPT PDF datasheet #3
- PIC18F65J50-IPT PDF datasheet #4
- Current page: 449 of 480
- Download datasheet (8Mb)
FIGURE 28-15:
TABLE 28-20: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0)
© 2009 Microchip Technology Inc.
70
70A
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1:
Param
No.
(CKP = 0)
(CKP = 1)
SDI
SDIx
SSx
SCKx
SCKx
SDOx
Note:
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SC
SC
Symbol
DI
DI
B
DO
DO
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
2
V2
V2
L2
L2
L2WB SSx ↓ to Write to SSPxBUF
H2
H2
L2
H2
L2
H
L
H2
L2
R
F
B
R
F
Refer to Figure 28-3 for load conditions.
SC
SC
DO
SS
SC
SC
DI
DO
DO
SS
DI
L
H
L,
H,
L
H,
L
V
H,
V,
Z SSx ↑ to SDOx Output High-Impedance
SSx ↓ to SCKx ↓ or SCKx ↑ Input
SCKx Input High Time
(Slave mode)
SCKx Input Low Time
(Slave mode)
Setup Time of SDIx Data Input to SCKx Edge
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SCKx Output Rise Time (Master mode)
SCKx Output Fall Time (Master mode)
SDOx Data Output Valid after SCKx Edge
SSx ↑ after SCKx Edge
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
80
71
73
MSb In
MSb
Characteristic
74
72
75, 76
bit 6 - - - - - - 1
bit 6 - - - - 1
Continuous
Single byte
Continuous
Single byte
PIC18F87J50 FAMILY
78
79
1.25 T
1.25 T
1.5 T
79
78
LSb In
3 T
3 T
Min
100
100
LSb
40
40
CY
10
CY
—
—
—
—
—
CY
CY
83
CY
CY
+ 40
+ 40
+ 30
+ 30
77
Max Units Conditions
25
25
50
25
25
50
—
—
—
—
—
—
—
—
—
—
DS39775C-page 449
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
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