PIC18F86J50T-I/PT Microchip Technology, PIC18F86J50T-I/PT Datasheet - Page 356

• Manufacturer Part Number: PIC18F86J50T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J50T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J50T-I/PTTR

PIC18F87J50 FAMILY
REGISTER 25-6:
DS39775C-page 356
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
U-1
—
Implemented only on 80-pin devices.
Unimplemented: Maintain as ‘1’
MSSPMSK: MSSP V3’s 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode enable
0 = 5-Bit Address Masking mode enable
PMPMX: PMP pin placement bit for the 80-pin TQFP
1 = PMP pins placed on EMB
0 = PMP pins placed else where
ECCPMX: ECCPx MUX bit
1 = ECCP1 outputs (P1B/P1C) are multiplexed with RE6 and RE5;
0 = ECCP1 outputs (P1B/P1C) are multiplexed with RH7 and RH6;
CCP2MX: ECCP2 MUX bit
1 = ECCP2/P2A is multiplexed with RC1
0 = ECCP2/P2A is multiplexed with RE7 in Microcontroller mode (all devices) or with RB3 in Extended
ECCP3 outputs (P3B/P3C) are multiplexed with RE4 and RE3
ECCP3 outputs (P3B/P3C) are multiplexed with RH5 and RH4
Microcontroller mode (80-pin devices only)
U-1
—
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
WO = Write-Once bit
‘1’ = Bit is set
U-1
—
(1)
U-1
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MSSPMSK
R/WO-1
(1)
PMPMX
R/WO-1
(1)
© 2009 Microchip Technology Inc.
x = Bit is unknown
ECCPMX
R/WO-1
(1)
CCP2MX
R/WO-1
bit 0