PIC18F86J55T-I/PT Microchip Technology, PIC18F86J55T-I/PT Datasheet - Page 151

• Manufacturer Part Number: PIC18F86J55T-I/PT
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J55T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 65
• Program Memory Size: 96KB (48K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: I2C, MSSP, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 65
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F86J55T-I/PTTR

TABLE 10-10: PORTD FUNCTIONS (CONTINUED)
TABLE 10-11: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
© 2009 Microchip Technology Inc.
PORTD
LATD
TRISD
PORTG
Legend: Shaded cells are not used by PORTD.
Note 1:
RD6/AD6/
PMD6/SCK2/
SCL2
RD7/AD7/
PMD7/SS2
Legend:
Note 1:
Pin Name
Name
2:
3:
Unimplemented on 64-pin devices, read as ‘0’.
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
External memory interface I/O takes priority over all other digital and PMP I/O.
Available on 80-pin devices only.
When PMPMX = 1.
TRISD7
LATD7
RDPU
Bit 7
RD7
Function
PMD6
PMD7
AD6
AD7
SCK2
SCL2
RD6
RD7
SS2
(2)
(2)
(3)
(3)
TRISD6
LATD6
REPU
Bit 6
RD6
Setting
TRIS
0
1
x
x
x
x
0
1
0
1
0
1
x
x
x
x
x
TRISD5
RJPU
LATD5
Bit 5
I/O
RD5
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
(1)
DIG-3
Type
DIG
TTL
DIG
TTL
DIG
DIG
DIG
DIG
TTL
DIG
TTL
TTL
I/O
ST
ST
ST
ST
TRISD4
LATD4
Bit 4
RD4
RG4
LATD<6> data output.
PORTD<6> data input.
External memory interface, address/data bit 6 output.
External memory interface, data bit 6 input.
Parallel Master Port data out.
Parallel Master Port data input.
SPI clock output (MSSP2 module); takes priority over port data.
SPI clock input (MSSP2 module).
I
I
setting.
LATD<7> data output.
PORTD<7> data input.
External memory interface, address/data bit 7 output.
External memory interface, data bit 7 input.
Parallel Master Port data out.
Parallel Master Port data input.
Slave select input for MSSP (MSSP2 module).
2
2
C™ clock output (MSSP2 module); takes priority over port data.
C clock input (MSSP2 module); input type depends on module
PIC18F87J50 FAMILY
TRISD3
LATD3
Bit 3
RD3
RG3
TRISD2
LATD2
Bit 2
RD2
RG2
Description
TRISD1
LATD1
Bit 1
RD1
RG1
(1)
(1)
TRISD0
LATD0
Bit 0
RD0
RG0
DS39775C-page 151
(1)
(1)
on Page:
Values
Reset
65
64
64
65