PIC18F87J90T-I/PT Microchip Technology, PIC18F87J90T-I/PT Datasheet - Page 322

• Manufacturer Part Number: PIC18F87J90T-I/PT
• Description: Segmented LCD, 128KB Flash, 4KB RAM, 12 MIPS, NanoWatt 80 TQFP 12x12x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J90T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F87J90 FAMILY
REGISTER 24-2:
DS39933D-page 322
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-5
bit 4
bit 3-2
bit 1
bit 0
EDG2POL
R/W-0
EDG2POL: Edge 2 Polarity Select bit
1 = Edge 2 programmed for a positive edge response
0 = Edge 2 programmed for a negative edge response
EDG2SEL<1:0>: Edge 2 Source Select bits
11 = CTEDG1 pin
10 = CTEDG2 pin
01 = CCP1 Special Event Trigger
00 = CCP2 Special Event Trigger
EDG1POL: Edge 1 Polarity Select bit
1 = Edge 1 programmed for a positive edge response
0 = Edge 1 programmed for a negative edge response
EDG1SEL<1:0>: Edge 1 Source Select bits
11 = CTEDG1 pin
10 = CTEDG2 pin
01 = CCP1 Special Event Trigger
00 = CCP2 Special Event Trigger
EDG2STAT: Edge 2 Status bit
1 = Edge 2 event has occurred
0 = Edge 2 event has not occurred
EDG1STAT: Edge 1 Status bit
1 = Edge 1 event has occurred
0 = Edge 1 event has not occurred
EDG2SEL1
R/W-0
CTMUCONL: CTMU CONTROL LOW REGISTER
W = Writable bit
‘1’ = Bit is set
EDG2SEL0
R/W-0
EDG1POL
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EDG1SEL1
R/W-0
EDG1SEL0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
EDG2STAT
R/W-0
EDG1STAT
R/W-0
bit 0