PIC18F87K90-E/PT Microchip Technology, PIC18F87K90-E/PT Datasheet - Page 431

• Manufacturer Part Number: PIC18F87K90-E/PT
• Description: 128kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TR
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F87K90-E/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 24x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 28-5:
REGISTER 28-6:
 2009-2011 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
Note 1:
MCLRE
R/P-1
U-0
—
This feature is only available on 80-pin devices.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin is enabled; RG5 input pin is disabled
0 = RG5 input pin is enabled; MCLR is disabled
Unimplemented: Read as ‘ 0 ’
MSSPMSK: MSSP V3 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode is enabled
0 = 5-Bit Address Masking mode is enabled
Unimplemented: Read as ‘ 0 ’
ECCPMX: ECCP MUX bit
1 = Enhanced ECCP1 (P1B/P1C) is multiplexed onto RE6 and RE5, CCP6 onto RE6 and CCP7 onto RE5
0 = Enhanced ECCP1 (P1B/P1C) is multiplexed onto RH7 and RH6, CCP6 onto RH7 and CCP7 onto RH6
CCP2MX: ECCP2 MUX bit
1 = ECCP2 is multiplexed with RC1
0 = ECCP2 input/output is multiplexed with RE7
Unimplemented: Read as ‘ 0 ’
RTCOSC: RTCC Reference Clock Select bit
1 = RTCC uses SOSC as a reference clock
0 = RTCC uses LF-INTOSC as a reference clock
Enhanced ECCP3 (P3B/P3C) is multiplexed onto RE4 and RE3, CCP8 onto RE4 and CCP9 onto RE3
Enhanced ECCP3 (P3B/P3C) is multiplexed onto RH5 and RH4, CCP8 onto RH5 and CCP9 onto RH4
U-0
—
U-0
—
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
U-0
—
U-0
—
(1)
U-0
—
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MSSPMSK
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
R/P-1
(1)
U-0
—
U-0
U-0
—
—
x = Bit is unknown
x = Bit is unknown
ECCPMX
R/P-1
U-0
—
DS39957D-page 431
(1)
CCP2MX
RTCOSC
R/P-1
R/P-1
bit 0
bit 0