PIC18F96J60-I/PT Microchip Technology, PIC18F96J60-I/PT Datasheet - Page 254

64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 12x12x1mm TRAY

PIC18F96J60-I/PT

Manufacturer Part Number
PIC18F96J60-I/PT
Description
64KB Flash, 12KB RAM, 10BASE-T Ethernet 100 TQFP 12x12x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F96J60-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
41.667MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Ram Size
3808 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
12 KB
Interface Type
Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
Maximum Clock Frequency
41.667 MHz
Number Of Programmable I/os
70
Number Of Timers
5
Operating Supply Voltage
2.35 V to 3.6 V
Maximum Operating Temperature
+ 100 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F96J60-I/PT
Manufacturer:
MICROCHIP
Quantity:
93
Part Number:
PIC18F96J60-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F97J60 FAMILY
18.8.6
The Magic Packet pattern consists of a sync pattern of
six FFh bytes, followed by 16 repeats of the destination
address (Figure 18-15). The Magic Packet filter checks
the destination address and data fields of all incoming
packets. If the destination address matches the
MAADR registers and the data field holds a valid Magic
Packet pattern someplace within it, then the packet will
meet the Magic Packet filter criteria.
FIGURE 18-15:
DS39762E-page 254
MAGIC PACKET FILTER
00 11 22 33 44 55
77 88 99 AA BB CC
00 FE
09 0A 0B 0C 0D 0E
FF FF FF FF FF 00
FF FF FF FF FF FF
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
00 11 22 33 44 55
19 1A 1B 1C 1D 1E
EF 54 32 10
SAMPLE MAGIC PACKET™ FORMAT
Received
Data
Type/Length
Header
Pattern
Packet
Footer
Magic
Field
FCS
DA
SA
Optional Application Data or Protocol Footer
Destination MAC Address
Destination MAC Address
Optional Application Data
Source MAC Address
or Protocol Header
16 Repeats of the
Sync Pattern
Comments
© 2009 Microchip Technology Inc.

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