PIC18LF14K22-E/P Microchip Technology, PIC18LF14K22-E/P Datasheet - Page 380
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PIC18LF14K22-E/P
Manufacturer Part Number
PIC18LF14K22-E/P
Description
16KB Flash, 512bytes RAM, 256bytes EEPROM, 16MIPS, NanoWatt XLP 20 PDIP .300in T
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18LF13K22-ISS.pdf
(388 pages)
Specifications of PIC18LF14K22-E/P
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F1XK22/LF1XK22
Power-on Reset (POR) ..................................................... 251
Power-up Timer (PWRT)
Precision Internal Oscillator Parameters........................... 352
Prescaler, Timer0................................................................ 99
PRI_IDLE Mode ................................................................ 236
PRI_RUN Mode ................................................................ 234
Program Counter................................................................. 28
Program Memory
Program Verification and Code Protection........................ 272
Programming, Device Instructions .................................... 277
PSTRCON Register .......................................................... 130
Pulse Steering................................................................... 130
PUSH ................................................................................ 306
PUSH and POP Instructions ............................................... 29
PUSHL .............................................................................. 322
PWM (ECCP Module)
PWM Mode. See Enhanced Capture/Compare/PWM ...... 117
PWM1CON Register ......................................................... 129
R
RAM. See Data Memory.
RC_IDLE Mode ................................................................. 237
RC_RUN Mode ................................................................. 234
RCALL............................................................................... 307
RCON Register ........................................................... 76, 250
RCREG ............................................................................. 186
RCSTA Register................................................................ 189
Reader Response ............................................................. 386
Register
Register File ........................................................................ 37
Register File Summary........................................................ 39
Registers
DS41365D-page 380
Selecting ................................................................... 233
Sleep Mode ............................................................... 235
Summary (table) ....................................................... 233
Power-up Timer (PWRT) .......................................... 253
Time-out Sequence................................................... 253
Specifications ............................................................ 354
PCL, PCH and PCU Registers.................................... 28
PCLATH and PCLATU Registers ............................... 28
and Extended Instruction Set ...................................... 47
Code Protection ........................................................ 274
Instructions.................................................................. 32
Interrupt Vector ........................................................... 27
Look-up Tables ........................................................... 30
Map and Stack (diagram)............................................ 27
Reset Vector ............................................................... 27
Associated Registers ................................................ 274
Effects of a Reset...................................................... 133
Operation in Power Managed Modes ....................... 133
Operation with Fail-Safe Clock Monitor .................... 133
Pulse Steering........................................................... 130
Steering Synchronization .......................................... 132
Bit Status During Initialization ................................... 256
RCREG Register....................................................... 195
ADCON0 (ADC Control 0) ........................................ 213
ADCON1 (ADC Control 1) ................................ 214, 215
ADRESH (ADC Result High) with ADFM = 0)........... 216
ADRESH (ADC Result High) with ADFM = 1)........... 216
ADRESL (ADC Result Low) with ADFM = 0) ............ 216
ADRESL (ADC Result Low) with ADFM = 1) ............ 216
ANSEL (Analog Select)............................................... 94
PRI_RUN .......................................................... 234
RC_RUN ........................................................... 234
SEC_RUN......................................................... 234
Two-Word ........................................................... 32
Preliminary
ANSELH (Analog Select High) ................................... 95
BAUDCON (EUSART Baud Rate Control) ............... 190
CCP1CON (Enhanced Capture/Compare/PWM
CM1CON0 (C1 Control)............................................ 227
CM2CON0 (C2 Control)............................................ 228
CM2CON1 (C2 Control)............................................ 231
CONFIG1H (Configuration 1 High) ........................... 263
CONFIG2H (Configuration 2 High) ........................... 265
CONFIG2L (Configuration 2 Low) ............................ 264
CONFIG3H (Configuration 3 High) ........................... 266
CONFIG4L (Configuration 4 Low) ............................ 266
CONFIG5H (Configuration 5 High) ........................... 267
CONFIG5L (Configuration 5 Low) ............................ 267
CONFIG6H (Configuration 6 High) ........................... 268
CONFIG6L (Configuration 6 Low) ............................ 268
CONFIG7H (Configuration 7 High) ........................... 269
CONFIG7L (Configuration 7 Low) ............................ 269
DEVID1 (Device ID 1)............................................... 270
DEVID2 (Device ID 2)............................................... 270
ECCPAS (Enhanced CCP Auto-shutdown Control) . 125
EECON1 (Data EEPROM Control 1).................... 51, 60
INTCON (Interrupt Control)......................................... 67
INTCON2 (Interrupt Control 2).................................... 68
INTCON3 (Interrupt Control 3).................................... 69
IOCA (Interrupt-on-Change PORTA).......................... 82
IOCB (Interrupt-on-Change PORTB).......................... 87
IPR1 (Peripheral Interrupt Priority 1) .......................... 74
IPR2 (Peripheral Interrupt Priority 2) .......................... 75
LATA (PORTA Data Latch)......................................... 82
LATB (PORTB Data Latch)......................................... 86
LATC (PORTC Data Latch) ........................................ 91
OSCCON (Oscillator Control) ............................... 20, 21
OSCTUNE (Oscillator Tuning).................................... 22
PIE1 (Peripheral Interrupt Enable 1)........................... 72
PIE2 (Peripheral Interrupt Enable 2)........................... 73
PIR1 (Peripheral Interrupt Request 1) ........................ 70
PIR2 (Peripheral Interrupt Request 2) ........................ 71
PORTA ....................................................................... 81
PORTB ................................................................. 86, 90
PSTRCON (Pulse Steering Control)......................... 130
PWM1CON (Enhanced PWM Control) ..................... 129
RCON (Reset Control)........................................ 76, 250
RCSTA (Receive Status and Control) ...................... 189
SLRCON (PORT Slew Rate Control) ......................... 96
SRCON0 (SR Latch Control 0) ................................. 240
SRCON1 (SR Latch Control 1) ................................. 241
SSPADD (MSSP Address and Baud Rate,
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode).................. 137
SSPCON2 (MSSP Control 2, I
SSPMSK (SSP Mask)............................................... 154
SSPSTAT (MSSP Status, SPI Mode)............... 136, 145
STATUS ..................................................................... 42
STKPTR (Stack Pointer)............................................. 29
T0CON (Timer0 Control) ............................................ 97
T1CON (Timer1 Control) .......................................... 101
T2CON (Timer2 Control) .......................................... 107
T3CON (Timer3 Control) .......................................... 109
TRISA (Tri-State PORTA)........................................... 81
TRISB (Tri-State PORTB)..................................... 86, 90
TXSTA (Transmit Status and Control) ...................... 188
VREFCON0 .............................................................. 245
VREFCON1 .............................................................. 246
Control)............................................................. 113
SPI Mode)......................................................... 155
2010 Microchip Technology Inc.
2
2
C Mode) .................. 146
C Mode) .................. 147
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