PIC18LF8723T-I/PT Microchip Technology, PIC18LF8723T-I/PT Datasheet - Page 26

• Manufacturer Part Number: PIC18LF8723T-I/PT
• Description: PIC18 With 128KB Flash, 4KB RAM, 1024 DataEE, 12-bit ADC 80 TQFP 12x12x1mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF8723T-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18LF8723T-I/PTTR

PIC18F8723 FAMILY
TABLE 1-3:
DS39894B-page 26
RE0/AD8/RD/P2D
RE1/AD9/WR/P2C
RE2/AD10/CS/P2B
RE3/AD11/P3C
RE4/AD12/P3B
RE5/AD13/P1C
RE6/AD14/P1B
RE7/AD15/ECCP2/
P2A
Legend: TTL = TTL compatible input
Note 1:
RE0
AD8
RD
P2D
RE1
AD9
WR
P2C
RE2
AD10
CS
P2B
RE3
AD11
P3C
RE4
AD12
P3B
RE5
AD13
P1C
RE6
AD14
P1B
RE7
AD15
ECCP2
P2A
2:
3:
4:
5:
Pin Name
(4)
(4)
(4)
(4)
(3)
ST = Schmitt Trigger input with CMOS levels
I
P
Alternate assignment for ECCP2 when Configuration bit, CCP2MX, is cleared (all operating modes except
Microcontroller mode).
Default assignment for ECCP2 in all operating modes (CCP2MX is set).
Alternate assignment for ECCP2 when CCP2MX is cleared (Microcontroller mode only).
Default assignment for P1B/P1C/P3B/P3C (ECCPMX is set).
Alternate assignment for P1B/P1C/P3B/P3C (ECCPMX is clear).
(3)
= Input
= Power
PIC18F8628/8723 (80-PIN) PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
TQFP
78
77
76
75
74
73
4
3
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
I
I
I
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
PORTE is a bidirectional I/O port.
Digital I/O.
External memory address/data 8.
Read control for Parallel Slave Port.
ECCP2 PWM output D.
Digital I/O.
External memory address/data 9.
Write control for Parallel Slave Port.
ECCP2 PWM output C.
Digital I/O.
External memory address/data 10.
Chip select control for Parallel Slave Port.
ECCP2 PWM output B.
Digital I/O.
External memory address/data 11.
ECCP3 PWM output C.
Digital I/O.
External memory address/data 12.
ECCP3 PWM output B.
Digital I/O.
External memory address/data 13.
ECCP1 PWM output C.
Digital I/O.
External memory address/data 14.
ECCP1 PWM output B.
Digital I/O.
External memory address/data 15.
Enhanced Capture 2 input/Compare 2 output/
PWM2 output.
ECCP2 PWM output A.
CMOS
Analog
O
I
2
C™/SMB = I
= CMOS compatible input or output
= Analog input
= Output
2
Description
C/SMBus input buffer
© 2009 Microchip Technology Inc.