PIC24F04KA200T-I/ST Microchip Technology, PIC24F04KA200T-I/ST Datasheet - Page 218

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PIC24F04KA200T-I/ST

Manufacturer Part Number
PIC24F04KA200T-I/ST
Description
PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F04KA200T-I/ST

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (1.375K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F04KA200T-I/ST
Manufacturer:
MICROCHIP
Quantity:
12 000
PIC24F04KA201 FAMILY
Deep Sleep BOR (DSBOR) ............................................... 56
Development Support ...................................................... 173
Device Features (Summary) ................................................ 9
Doze Mode ......................................................................... 97
E
Electrical Characteristics
Equations
Errata ................................................................................... 5
F
Flash Program Memory
H
High/Low-Voltage Detect (HLVD) .................................... 141
I
I/O Ports
I
In-Circuit Serial Programming .......................................... 171
Input Capture ................................................................... 109
Instruction Set
Instruction-Based Power-Saving Modes ............................ 91
Inter-Integrated Circuit. See I
Internet Address ............................................................... 218
Interrupts
DS39937B-page 216
2
C
Absolute Maximum Ratings ..................................... 185
Thermal Operating Conditions ................................. 186
V/F Graphs ............................................................... 186
A/D Conversion Clock Period .................................. 150
Baud Rate Reload Value ......................................... 127
Calculating the PWM Period .................................... 112
Calculation for Maximum PWM Resolution .............. 112
Device and SPI Clock Speed Relationship .............. 124
UART Baud Rate with BRGH = 0 ............................ 134
UART Baud Rate with BRGH = 1 ............................ 134
Control Registers ....................................................... 44
Enhanced ICSP Operation ......................................... 44
Operations ................................................................. 44
Programming Algorithm ............................................. 46
RTSP Operation ......................................................... 44
Table Instructions ....................................................... 43
Analog Port Pins Configuration ................................ 100
Input Change Notification ......................................... 100
Open-Drain Configuration ........................................ 100
Parallel (PIO) ............................................................. 99
Clock Rates .............................................................. 127
Communicating as Master in Single
Pin Remapping Options ........................................... 125
Reserved Addresses ................................................ 127
Slave Address Masking ........................................... 127
Opcode Symbols ...................................................... 178
Overview .................................................................. 179
Summary .................................................................. 177
Deep Sleep ................................................................ 92
Idle ............................................................................. 92
Sleep .......................................................................... 91
Alternate Interrupt Vector Table (AIVT) ..................... 57
Implemented Vectors ................................................. 58
Interrupt Vector Table (IVT) ....................................... 57
Reset Sequence ........................................................ 57
Setup and Service Procedures .................................. 80
Trap Vectors .............................................................. 58
Vector Table ............................................................... 57
Master Environment ......................................... 125
2
C.
Preliminary
M
Microchip Internet Web Site ............................................. 218
MPLAB ASM30 Assembler, Linker, Librarian .................. 174
MPLAB ICD 2 In-Circuit Debugger .................................. 175
MPLAB ICE 2000 High-Performance
MPLAB Integrated Development
MPLAB PM3 Device Programmer ................................... 175
MPLAB REAL ICE In-Circuit Emulator System ............... 175
MPLINK Object Linker/MPLIB Object Librarian ............... 174
N
Near Data Space ............................................................... 28
O
Oscillator Configuration
Output Compare
P
Packaging
PICSTART Plus Development Programmer .................... 176
Pinout Descriptions ...................................................... 11–13
Power-Saving Features ..................................................... 91
Product Identification System .......................................... 220
Program and Data Memory
Program and Data Memory Spaces
Program Memory
Program Verification ........................................................ 171
Pulse-Width Modulation. See PWM.
R
Reader Response ............................................................ 219
Reference Clock Output .................................................... 88
Register Maps
Universal In-Circuit Emulator ................................... 175
Environment Software ............................................. 173
Clock Switching ......................................................... 87
Configuration Values for Clock Selection .................. 82
CPU Clocking Scheme .............................................. 82
Initial Configuration on POR ...................................... 82
Continuous Output Pulse Generation ...................... 111
PWM Mode
Single Output Pulse Generation .............................. 111
Details ...................................................................... 207
Marking .................................................................... 205
Clock Frequency and Clock Switching ...................... 91
Access Using Table Instructions ................................ 39
Program Space Visibility ............................................ 40
Interfacing .................................................................. 37
Address Space .......................................................... 25
Memory Map .............................................................. 25
A/D Converter (ADC) ................................................. 34
Clock Control ............................................................. 35
CPU Core .................................................................. 29
CTMU ........................................................................ 34
Deep Sleep ................................................................ 35
Dual Comparator ....................................................... 35
I
ICN ............................................................................ 30
Input Capture ............................................................. 31
Interrupt Controller ..................................................... 30
NVM ........................................................................... 36
Output Compare ........................................................ 31
Pad Configuration ...................................................... 33
2
C ............................................................................. 32
Sequence .......................................................... 87
Period and Duty Cycle Calculations ................ 113
© 2009 Microchip Technology Inc.

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