PIC24F04KA200T-I/ST Microchip Technology, PIC24F04KA200T-I/ST Datasheet - Page 34

• Manufacturer Part Number: PIC24F04KA200T-I/ST
• Description: PIC24F Core, 4KB Flash, 512B RAM, 3V, Deep Sleep, 10-bit 500ksps ADC, CTMU, UART
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA200T-I/ST

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 4KB (1.375K x 24)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-9:
TABLE 4-10:
TABLE 4-11:
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT
I2C1ADD
I2C1MSK
Legend:
U1MODE
U1STA
U1TXREG
U1RXREG
U1BRG
Legend:
SPI1STAT
SPI1CON1
SPI1CON2
SPI1BUF
Legend:
File Name
Name
Name
File
File
Addr
0220
0222
0224
0226
0228
Addr
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
0240
0242
0244
0248
— = unimplemented, read as ‘
Addr
020A
020C
0200
0202
0204
0206
0208
UTXISEL1 UTXINV UTXISEL0
UARTEN
I
UART REGISTER MAP
SPI REGISTER MAP
FRMEN
Bit 15
2
SPIEN
Bit 15
C™ REGISTER MAP
—
—
ACKSTAT TRSTAT
—
Bit 15
I2CEN
—
—
—
—
—
SPIFSD
Bit 14
Bit 14
—
—
—
—
—
Bit 14
—
—
—
—
—
—
SPIFPOL
USIDL
SPISIDL
Bit 13
Bit 13
—
—
I2CSIDL SCLREL IPMIEN
—
0
Bit 13
’. Reset values are shown in hexadecimal.
—
—
—
—
—
—
Bit 12
DISSCK
IREN
Bit 12
—
—
—
Bit 12
—
—
—
—
—
—
—
—
UTXBRK
RTSMD
Bit 11
DISSDO
Bit 11
—
—
Bit 11
—
—
—
—
—
—
—
—
UTXEN
Bit 10
SPIBEC2 SPIBEC1 SPIBEC0
MODE16
Bit 10
Bit 10
—
—
—
A10M
BCL
—
—
—
—
—
—
UTXBF
UEN1
DISSLW
GCSTAT
Bit 9
Baud Rate Generator Prescaler Register
AMSK9
—
—
Bit 9
Bit 9
SMP
—
—
—
—
SPI1 Transmit/Receive Buffer
TRMT
UEN0
Bit 8
AMSK8
ADD10
SMEN
Bit 8
Bit 8
CKE
—
—
—
URXISEL1
WAKE
Bit 7
SRMPT
IWCOL
AMSK7
GCEN
SSEN
Bit 7
Bit 7
—
URXISEL0
SPIROV
LPBACK
STREN
AMSK6
I2COV
Bit 6
Bit 6
CKP
Bit 6
—
I2C1 Baud Rate Generator Register
I2C1 Address Register
SRXMPT
MSTEN
ACKDT
AMSK5
Bit 5
Bit 5
UART1 Transmit Register
UART1 Receive Register
D/A
ABAUD
ADDEN
—
Bit 5
I2C1 Transmit Register
I2C1 Receive Register
ACKEN
SISEL2
SPRE2
AMSK4
Bit 4
Bit 4
—
RXINV
RIDLE
P
Bit 4
SISEL1
AMSK3
SPRE1
RCEN
Bit 3
Bit 3
—
BRGH
PERR
S
Bit 3
SISEL0
AMSK2
SPRE0
Bit 2
Bit 2
PEN
R/W
PDSEL1 PDSEL0 STSEL
—
FERR
Bit 2
SPITBF
PPRE1
AMSK1
SPIFE
RSEN
Bit 1
Bit 1
RBF
OERR
Bit 1
SPIRBF
SPIBEN
AMSK0
URXDA
PPRE0
Bit 0
Bit 0
Bit 0
SEN
TBF
Resets
Resets
Resets
0000
0110
0000
0000
0000
0000
00FF
0000
1000
0000
0000
0000
0000
0000
0000
0000
All
All
All