PIC24F32KA302-E/SP Microchip Technology, PIC24F32KA302-E/SP Datasheet - Page 114
PIC24F32KA302-E/SP
Manufacturer Part Number
PIC24F32KA302-E/SP
Description
32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SPDIP .300in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.PIC24F16KA301T-ISO.pdf
(320 pages)
Specifications of PIC24F32KA302-E/SP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC24FV32KA304 FAMILY
REGISTER 8-33:
DS39995B-page 114
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11-8
bit 7
bit 6-0
CPUIRQ
R-0
U-0
—
CPUIRQ: Interrupt Request from Interrupt Controller CPU bit
1 = An interrupt request has occurred but has not yet been Acknowledged by the CPU (this will
0 = No interrupt request is left unacknowledged
Unimplemented: Read as ‘0’
VHOLD: Vector Hold bit
Allows vector number capture and changes what Interrupt is stored in the VECNUM bit.
1 = VECNUM will contain the value of the highest priority pending interrupt, instead of the current
0 = VECNUM will contain the value of the last Acknowledged interrupt (last interrupt that has occurred
Unimplemented: Read as ‘0’
ILR<3:0>: New CPU Interrupt Priority Level bits
1111 = CPU interrupt priority level is 15
•
•
•
0001 = CPU interrupt priority level is 1
0000 = CPU interrupt priority level is 0
Unimplemented: Read as ‘0’
VECNUM<6:0>: Vector Number of Pending Interrupt bits
0111111 = Interrupt vector pending is number 135
•
•
•
0000001 = Interrupt vector pending is number 9
0000000 = Interrupt vector pending is number 8
VECNUM6
happen when the CPU priority is higher than the interrupt priority)
interrupt
with higher priority than the CPU, even if other interrupts are pending)
U-0
R-0
—
INTTREG: INTERRUPT CONTROL AND STATUS REGISTER
W = Writable bit
‘1’ = Bit is set
VECNUM5
VHOLD
R/W-0
R-0
VECNUM4
U-0
R-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
VECNUM3
ILR3
R-0
R-0
VECNUM2
ILR2
R-0
R-0
2011 Microchip Technology Inc.
x = Bit is unknown
VECNUM1
ILR1
R-0
R-0
VECNUM0
ILR0
R-0
R-0
bit 8
bit 0
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