PIC24F32KA302-E/SP Microchip Technology, PIC24F32KA302-E/SP Datasheet - Page 84
PIC24F32KA302-E/SP
Manufacturer Part Number
PIC24F32KA302-E/SP
Description
32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SPDIP .300in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet
1.PIC24F16KA301T-ISO.pdf
(320 pages)
Specifications of PIC24F32KA302-E/SP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC24FV32KA304 FAMILY
REGISTER 8-2:
DS39995B-page 84
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-4
bit 3
bit 1-0
Note 1:
Note:
U-0
U-0
—
—
2:
See
The IPL3 bit is concatenated with the IPL<2:0> bits (SR<7:5>) to form the CPU interrupt priority level.
Bit 2 is described in
Unimplemented: Read as ‘0’
IPL3: CPU Interrupt Priority Level Status bit
1 = CPU interrupt priority level is greater than 7
0 = CPU interrupt priority level is 7 or less
Unimplemented: Read as ‘0’
Register 3-2
U-0
U-0
—
—
CORCON: CPU CONTROL REGISTER
for the description of this bit, which is not dedicated to interrupt control functions.
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
Section 3.0
U-0
U-0
—
—
“CPU”.
U-0
U-0
—
—
(2)
HSC = Hardware Settable/Clearable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0, HSC
IPL3
U-0
—
(2)
PSV
R/W-0
U-0
—
(1)
2011 Microchip Technology Inc.
x = Bit is unknown
U-0
U-0
—
—
U-0
U-0
—
—
bit 8
bit 0
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