PIC24FJ32GA102-E/SS Microchip Technology, PIC24FJ32GA102-E/SS Datasheet - Page 62

• Manufacturer Part Number: PIC24FJ32GA102-E/SS
• Description: 16-bit, 16 MIPS, 32KB Flash, 8KB RAM, Nanowatt XLP 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ32GA102-E/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Supply Current (max): 300 mA
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Eeprom Size: -
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FJ64GA104 FAMILY
TABLE 6-3:
DS39951C-page 62
POR
BOR
All Others
Note 1:
Note:
Reset Type
(6)
2:
3:
4:
5:
6:
7:
8:
T
T
T
T
T
T
oscillator clock to the system.
If Two-Speed Start-up is enabled, regardless of the Primary Oscillator selected, the device starts with
FRC, and in such cases, FRC start-up time is valid.
T
For detailed operating frequency and timing specifications, see Section 28.0 “Electrical Characteristics”.
OST
RST
RST
POR
PWRT
FRC
LOCK
= Internal State Reset time.
and T
= Oscillator Start-up Timer (OST). A 10-bit counter waits 1024 oscillator periods before releasing the
= Configuration setup time.
= Power-on Reset delay.
RESET DELAY TIMES FOR VARIOUS DEVICE RESETS
= PLL lock time.
= 64 ms nominal if regulator is disabled (DISVREG tied to V
EC
FRC, FRCDIV
LPRC
ECPLL
FRCPLL
XT, HS, SOSC
XTPLL, HSPLL
EC
FRC, FRCDIV
LPRC
ECPLL
FRCPLL
XT, HS, SOSC
XTPLL, HSPLL
Any Clock
LPRC
Clock Source
= RC Oscillator start-up times.
T
T
T
T
T
T
T
POR
POR
POR
POR
POR
POR
POR
SYSRST Delay
T
T
T
T
T
T
T
RST
RST
RST
RST
RST
RST
RST
+ T
+ T
+ T
+ T
+ T
+ T
+ T
T
RST
RST
RST
RST
RST
RST
RST
+ T
+ T
+ T
+ T
+ T
+ T
+ T
RST
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
+ T
+ T
+ T
+ T
+ T
+ T
+ T
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
PWRT
DD
).
System Clock
T
T
T
T
OST
FRC
FRC
FRC
 2010 Microchip Technology Inc.
T
T
Delay
T
T
T
T
T
T
LOCK
LOCK
LPRC
LPRC
OST
+ T
OST
FRC
+ T
FRC
+ T
+ T
—
—
—
LOCK
LOCK
LOCK
LOCK
1, 2, 3, 8
1, 2, 3, 4, 7, 8
1, 2, 3, 4, 8
1, 2, 3, 5, 8
1, 2, 3, 4, 5, 7, 8
1, 2, 3, 6, 8
1, 2, 3, 5, 6, 8
2, 3, 8
2, 3, 4, 7, 8
2, 3, 4, 8
2, 3, 5, 8
2, 3, 4, 5, 7, 8
2, 3, 6, 8
2, 3, 4, 5, 8
2, 8
Notes