PIC24FJ64GA102-E/SS Microchip Technology, PIC24FJ64GA102-E/SS Datasheet - Page 297

• Manufacturer Part Number: PIC24FJ64GA102-E/SS
• Description: 16-bit, 16 MIPS, 64KB Flash, 8KB RAM, Nanowatt XLP 28 SSOP .209in TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ64GA102-E/SS

• Processor Series: PIC24
• Core: PIC24F
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 64 KB
• Data Ram Size: 8192 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SSOP-28
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Supply Current (max): 300 mA
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Eeprom Size: -
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

APPENDIX A:
Revision A (August 2009)
Original data sheet for the PIC24FJ64GA104 family of
devices.
Revision B (October 2009)
Corrected Section 10.3 “Input Change Notification”
regarding the number of ICN inputs and the availability
of pull-downs.
Updated Section 10.4.2 “Available Peripherals” by
removing the Timer 1 clock input from Table 10-2.
Updated Section 28.1 “DC Characteristics” as
follows:
• Added new specifications to Tables 29-4 and 29-5
• Updated Table 29-4 with revised maximum I
• Renumbered the parameters for the delta I
Revision C (August 2010)
This revision includes the following updates:
Pin Diagrams
• Updated Pin 7 and Pin 14 in 28-Pin SPDIP, SOIC.
• Updated the device name, Pin13 and Pin 23, in
Removed IEC5, IFS5 and IPC21 rows from Table 4-5.
Updated CLKDIV bit details in Table 4-23.
Removed JTAG from Flash programming list in
Section 5.0 “Flash Program Memory”.
Updated
Peripheral Pin Selection” as follows:
• Replaced the code in Example 10-2.
• Added the new code as Example 10-3.
Updated shaded note in Section 20.0 “32-Bit Pro-
grammable Cyclic Redundancy Check (CRC)
Generator” and Section 22.0 “Triple Comparator
Module”.
Updated Section 28.1 “DC Characteristics” as
follows:
• Updated the device name in Table 28-1.
• Added the “125°C data” in
• Updated Min and Typ columns of DC16 in
• Added rows, AD08 and AD09, in Table 28-22.
• Added Figure 28-2.
Added the 28-pin SSOP package to Section 29.0
“Packaging Information”.
 2010 Microchip Technology Inc.
for I
specifications for 1 MIP and 4 MIPS.
current (32 kHz, SOSCEL = 11) from DC62n to
DC63n.
28-Pin QFN.
Table 28-4,Table 28-5,Table 28-6 and Table 28-7.
Table 28-3.
DD
and I
Section 10.4.5
IDLE
at 0.5 MIPS operation.
REVISION HISTORY
“Considerations
PD
DD
PIC24FJ64GA104 FAMILY
for
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