PIC24HJ32GP302-E/MM Microchip Technology, PIC24HJ32GP302-E/MM Datasheet - Page 114
![16 Bit MCU 40MIPS 32 KB FLASH 28 QFN-S 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24HJ32GP302-E/MM
Manufacturer Part Number
PIC24HJ32GP302-E/MM
Description
16 Bit MCU 40MIPS 32 KB FLASH 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP302-E/MM
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- Current page: 114 of 368
- Download datasheet (5Mb)
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
REGISTER 8-8:
DS70293E-page 114
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PPST7
U-0
R-0
—
Unimplemented: Read as ‘0’
LSTCH<3:0>: Last DMA Channel Active bits
1111 = No DMA transfer has occurred since system Reset
1110-1000 = Reserved
0111 = Last data transfer was by DMA Channel 7
0110 = Last data transfer was by DMA Channel 6
0101 = Last data transfer was by DMA Channel 5
0100 = Last data transfer was by DMA Channel 4
0011 = Last data transfer was by DMA Channel 3
0010 = Last data transfer was by DMA Channel 2
0001 = Last data transfer was by DMA Channel 1
0000 = Last data transfer was by DMA Channel 0
PPST7: Channel 7 Ping-Pong Mode Status Flag bit
1 = DMA7STB register selected
0 = DMA7STA register selected
PPST6: Channel 6 Ping-Pong Mode Status Flag bit
1 = DMA6STB register selected
0 = DMA6STA register selected
PPST5: Channel 5 Ping-Pong Mode Status Flag bit
1 = DMA5STB register selected
0 = DMA5STA register selected
PPST4: Channel 4 Ping-Pong Mode Status Flag bit
1 = DMA4STB register selected
0 = DMA4STA register selected
PPST3: Channel 3 Ping-Pong Mode Status Flag bit
1 = DMA3STB register selected
0 = DMA3STA register selected
PPST2: Channel 2 Ping-Pong Mode Status Flag bit
1 = DMA2STB register selected
0 = DMA2STA register selected
PPST1: Channel 1 Ping-Pong Mode Status Flag bit
1 = DMA1STB register selected
0 = DMA1STA register selected
PPST0: Channel 0 Ping-Pong Mode Status Flag bit
1 = DMA0STB register selected
0 = DMA0STA register selected
PPST6
U-0
R-0
—
DMACS1: DMA CONTROLLER STATUS REGISTER 1
W = Writable bit
‘1’ = Bit is set
PPST5
U-0
R-0
—
PPST4
U-0
R-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PPST3
R-1
R-0
PPST2
R-1
R-0
LSTCH<3:0>
© 2011 Microchip Technology Inc.
x = Bit is unknown
PPST1
R-1
R-0
PPST0
R-1
R-0
bit 8
bit 0
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