PIC24HJ32GP302-E/MM Microchip Technology, PIC24HJ32GP302-E/MM Datasheet - Page 187
![16 Bit MCU 40MIPS 32 KB FLASH 28 QFN-S 6x6mm TUBE](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC24HJ32GP302-E/MM
Manufacturer Part Number
PIC24HJ32GP302-E/MM
Description
16 Bit MCU 40MIPS 32 KB FLASH 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 24Hr
Datasheets
1.PIC24HJ12GP201-ISO.pdf
(84 pages)
2.PIC24HJ32GP302-ISO.pdf
(368 pages)
3.PIC24HJ32GP302-ISO.pdf
(8 pages)
4.PIC24HJ32GP302-ISO.pdf
(12 pages)
Specifications of PIC24HJ32GP302-E/MM
Core Processor
PIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (11K x 24)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- PIC24HJ12GP201-ISO PDF datasheet
- PIC24HJ32GP302-ISO PDF datasheet #2
- PIC24HJ32GP302-ISO PDF datasheet #3
- PIC24HJ32GP302-ISO PDF datasheet #4
- Current page: 187 of 368
- Download datasheet (5Mb)
18.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules avail-
able in the PIC24HJ32GP302/304, PIC24HJ64GPX02/
X04 and PIC24HJ128GPX02/X04 device family. The
UART is a full-duplex asynchronous system that can
communicate with peripheral devices, such as per-
sonal computers, LIN 2.0, RS-232 and RS-485 inter-
faces. The module also supports a hardware flow
control option with the UxCTS and UxRTS pins and
also includes an IrDA
FIGURE 18-1:
© 2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
Note 1: Both UART1 and UART2 can trigger a DMA data transfer.
2: Some registers and associated bits
2: If DMA transfers are required, the UART TX/RX FIFO buffer must be set to a size of 1 byte/word
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
PIC24HJ32GP302/304, PIC24HJ64GPX02/X04 AND PIC24HJ128GPX02/X04
of
PIC24HJ64GPX02/X04
PIC24HJ128GPX02/X04
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 17. “UART”
(DS70188) of the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip website
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
(i.e., UTXISEL<1:0> = 00 and URXISEL<1:0> = 00).
the
®
UART SIMPLIFIED BLOCK DIAGRAM
encoder and decoder.
PIC24HJ32GP302/304,
Hardware Flow Control
Baud Rate Generator
UART Transmitter
UART Receiver
IrDA
families
®
and
of
in
The primary features of the UART module are:
• Full-Duplex, 8- or 9-bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
• One or two stop bits
• Hardware flow control option with UxCTS and
• Fully integrated Baud Rate Generator with 16-bit
• Baud rates ranging from 10 Mbps to 38 bps at 40
• 4-deep First-In First-Out (FIFO) Transmit Data
• 4-deep FIFO Receive Data buffer
• Parity, framing and buffer overrun error detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive interrupts
• A separate interrupt for all UART error conditions
• Loopback mode for diagnostic support
• Support for sync and break characters
• Support for automatic baud rate detection
• IrDA
• 16x baud clock output for IrDA
A simplified block diagram of the UART module is
shown in
these key hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
the UxTX and UxRX pins
UxRTS pins
prescaler
MIPS
buffer
(9th bit = 1)
®
encoder and decoder logic
Figure
18-1. The UART module consists of
BCLK
UxRTS
UxCTS
UxRX
UxTX
®
support
DS70293E-page 187
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