SST25VF032B-80-4I-S2AF-T Microchip Technology, SST25VF032B-80-4I-S2AF-T Datasheet

2.7V To 3.6V 32Mbit SPI Serial Flash 8 SOIJ .208 In. T/R

SST25VF032B-80-4I-S2AF-T

Manufacturer Part Number
SST25VF032B-80-4I-S2AF-T
Description
2.7V To 3.6V 32Mbit SPI Serial Flash 8 SOIJ .208 In. T/R
Manufacturer
Microchip Technology

Specifications of SST25VF032B-80-4I-S2AF-T

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (4M x 8)
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (0.200", 5.30mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©2011 Silicon Storage Technology, Inc.
A Microchip Technology Company
Features:
• Single Voltage Read and Write Operations
• Serial Interface Architecture
• High Speed Clock Frequency
• Superior Reliability
• Low Power Consumption:
• Flexible Erase Capability
• Fast Erase and Byte-Program:
• Auto Address Increment (AAI) Word Programming
– 2.7-3.6V
– SPI Compatible: Mode 0 and Mode 3
– Up to 80 MHz
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
– Active Read Current: 10 mA (typical)
– Standby Current: 5 µA (typical)
– Uniform 4 KByte sectors
– Uniform 32 KByte overlay blocks
– Uniform 64 KByte overlay blocks
– Chip-Erase Time: 35 ms (typical)
– Sector-/Block-Erase Time: 18 ms (typical)
– Byte-Program Time: 7 µs (typical)
– Decrease total chip programming time over Byte-Pro-
gram operations
SST's 25 series Serial Flash family features a four-wire, SPI-compatible inter-
face that allows for a low pin-count package which occupies less board space
and ultimately lowers total system costs. The SST25VF032B devices are
enhanced with improved operating frequency which lowers power consumption.
SST25VF032B SPI serial flash memories are manufactured with SST's proprie-
tary, high-performance CMOS SuperFlash technology. The split-gate cell design
and thick-oxide tunneling injector attain better reliability and manufacturability
compared with alternate approaches.
www.microchip.com
www.sst.com
• End-of-Write Detection
• Hold Pin (HOLD#)
• Write Protection (WP#)
• Software Write Protection
• Temperature Range
• Packages Available
• All devices are RoHS compliant
– Software polling the BUSY bit in Status Register
– Busy Status readout on SO pin
– Suspends a serial sequence to the memory
– Enables/Disables the Lock-Down function of the status
– Write protection through Block-Protection bits in status
– Industrial: -40°C to +85°C
– 8-lead SOIC (200 mils)
– 8-contact WSON (5 X 6 mm)
without deselecting the device
register
register
32 Mbit SPI Serial Flash
SST25VF032B
S71327-04-000
Data Sheet
02/11

Related parts for SST25VF032B-80-4I-S2AF-T

SST25VF032B-80-4I-S2AF-T Summary of contents

Page 1

... SST's 25 series Serial Flash family features a four-wire, SPI-compatible inter- face that allows for a low pin-count package which occupies less board space and ultimately lowers total system costs. The SST25VF032B devices are enhanced with improved operating frequency which lowers power consumption. SST25VF032B SPI serial flash memories are manufactured with SST's proprie- tary, high-performance CMOS SuperFlash technology ...

Page 2

... The SST25VF032B devices significantly improve performance and reliability, while lowering power consumption. The devices write (Program or Erase) with a single power supply of 2.7-3.6V for SST25VF032B. The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash memory technologies ...

Page 3

... Detection” on page 12. for details Figure 1: Functional Block Diagram ©2011 Silicon Storage Technology, Inc Decoder Address Buffers and Latches Control Logic Serial Interface CE# SCK Mbit SPI Serial Flash SST25VF032B Data Sheet SuperFlash Memory Y - Decoder I/O Buffers and Data Latches WP# HOLD# 1327 B1.0 S71327-04-000 02/11 ...

Page 4

... The Write Protect (WP#) pin is used to enable/disable BPL bit in the status reg- ister. To temporarily stop serial communication with SPI flash memory without reset- ting the device. To provide power supply voltage: 2.7-3. Mbit SPI Serial Flash SST25VF032B Data Sheet CE ...

Page 5

... Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). The SST25VF032B supports both Mode 0 (0,0) and Mode 3 (1,1) of SPI bus operations. The difference between the two modes, as shown in Figure 3, is the state of the SCK signal when the bus master is in Stand-by mode and no data is being transferred ...

Page 6

... Figure 4: Hold Condition Waveform Write Protection SST25VF032B provides software Write protection. The Write Protect pin (WP#) enables or disables the lock-down function of the status register. The Block-Protection bits (BP3, BP2, BP1, BP0, and BPL) in the status register provide Write protection to the memory array and the status register. See Table 4 for the Block-Protection description ...

Page 7

... Indicate current level of block write protection (See Table 4) Indicate current level of block write protection (See Table 4) Auto Address Increment Programming status 1 = AAI programming mode 0 = Byte-Program mode 1 = BP3, BP2, BP1, BP0 are read-only bits 0 = BP3, BP2, BP1, BP0 are readable/writable 7 SST25VF032B Data Sheet Default at Power-up Read/Write ...

Page 8

... Silicon Storage Technology, Inc. 32 Mbit SPI Serial Flash ), enables the Block-Protection-Lock-Down (BPL) bit. When BPL is set Status Register Bit BP3 BP2 BP1 SST25VF032B Data Sheet 1 SST25VF032B FOR 2 Protected Memory Address BP0 32 Mbit 0 None 1 3F0000H-3FFFFFH 0 3E0000H-3FFFFFH 1 3C0000H-3FFFFFH 0 380000H-3FFFFFH 1 300000H-3FFFFFH 0 200000H-3FFFFFH 1 000000H-3FFFFFH S71327-04-000 T4.0 1327 02/11 ...

Page 9

... A Microchip Technology Company Instructions Instructions are used to read, write (Erase and Program), and configure the SST25VF032B. The instruction bus cycles are 8 bits each for commands (Op Code), data, and addresses. The Write- Enable (WREN) instruction must be executed prior any Byte-Program, Auto Address Increment (AAI) programming, Sector-Erase, Block-Erase, Write-Status-Register, or Chip-Erase instructions ...

Page 10

... with and Device ID is read with ADD. ADD. ADD. MSB HIGH IMPEDANCE 10 32 Mbit SPI Serial Flash SST25VF032B Address Dummy Data 1 2 Cycle(s) Cycle(s) Cycle( with A =0, Data Byte 1 will be 23 ...

Page 11

... Figure 7: Byte-Program Sequence ©2011 Silicon Storage Technology, Inc and a dummy byte. CE# must remain active low for the ADD. ADD. ADD. HIGH IMPEDANCE CE MODE 3 SCK MODE Mbit SPI Serial Flash SST25VF032B N+1 N+2 N OUT OUT OUT OUT MSB -A ]. Following the address, the data ...

Page 12

... Enable-Latch bit (WEL=0) and AAI bit. Then execute the 8-bit DBSY command, 80H, to disable RY/ BY# status during the AAI command. See Figures 9 and 10. ©2011 Silicon Storage Technology, Inc. 32 Mbit SPI Serial Flash -A ] with The Hardware End-of-Write detection method is described in the BP. 12 SST25VF032B Data Sheet BP Fol with A =0, the second 23 ...

Page 13

... Figure 8: Enable SO as Hardware RY/BY# During AAI Programming Figure 9: Disable SO as Hardware RY/BY# During AAI Programming ©2011 Silicon Storage Technology, Inc. 32 Mbit SPI Serial Flash CE# MODE SCK MODE MSB HIGH IMPEDANCE SO 1327 F09.0 CE# MODE SCK MODE MSB HIGH IMPEDANCE SO 1327 F10.0 13 SST25VF032B Data Sheet S71327-04-000 02/11 ...

Page 14

... SCK cont cont. n-1 Last 2 Data Bytes SO cont. Check for Flash Busy Status to load next valid Wait T register to load next valid Mbit SPI Serial Flash SST25VF032B Check for Flash Busy Status to load next valid command WRDI DBSY RDSR WRDI followed by DBSY ...

Page 15

... Silicon Storage Technology, Inc Address bits [ remaining address bits can CE MODE 3 SCK MODE HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF032B Data Sheet = Most Significant address) are used CE# must be driven high IL IH ADD. ADD. ADD. 1327 F13.0 S71327-04-000 for the SE 02/11 ...

Page 16

... CE# MODE MODE 0 SCK 52 SI MSB HIGH IMPEDANCE SO CE# MODE MODE 0 SCK D8 SI MSB HIGH IMPEDANCE Mbit SPI Serial Flash SST25VF032B - remaining address bits can ADDR ADDR ADDR MSB 1327 32KBklEr ADDR ADDR ADDR MSB 1327 63KBlkEr.0 S71327-04-000 Data Sheet ]. Address ...

Page 17

... Silicon Storage Technology, Inc. CE# MODE SCK MODE MSB HIGH IMPEDANCE MSB HIGH IMPEDANCE 17 32 Mbit SPI Serial Flash SST25VF032B for the comple- CE 1327 F16 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 MSB Status Register Out 1327 F17.0 S71327-04-000 Data Sheet 02/11 ...

Page 18

... CE# must be driven high before the WRDI instruction is executed. Figure 18:Write Disable (WRDI) Sequence ©2011 Silicon Storage Technology, Inc. 32 Mbit SPI Serial Flash CE# MODE SCK MODE MSB HIGH IMPEDANCE SO 1327 F18.0 CE# MODE SCK MODE MSB HIGH IMPEDANCE SO 1327 F19.0 18 SST25VF032B Data Sheet after executing the WRDI BP S71327-04-000 02/11 ...

Page 19

... Figure 19:Enable-Write-Status-Register (EWSR) or Write-Enable (WREN) and Write-Sta- tus-Register (WRSR) Sequence ©2011 Silicon Storage Technology, Inc. ) prior to the low-to-high transition of the CE# pin at the end MODE 3 MODE MSB MSB HIGH IMPEDANCE 19 32 Mbit SPI Serial Flash SST25VF032B Data Sheet STATUS REGISTER MSB 1327 F20.0 S71327-04-000 02/11 ...

Page 20

... A Microchip Technology Company Read-ID (RDID) The Read-ID instruction (RDID) identifies the device as SST25VF032B and manufacturer as SST. The device information can be read from executing an 8-bit command, 90H or ABH, followed by address bits [ Following the Read-ID instruction, the manufacturer’ located in address 00000H 23 0 and the device ID is located in address 00001H. Once the device is in Read-ID mode, the manufac- turer’ ...

Page 21

... Read-ID instruction, the 8-bit manufacturer’s ID, BFH, is output from the device. After that, a 24-bit device ID is shifted out on the SO pin. Byte 1, BFH, identifies the manufacturer as SST. Byte 2, 25H, identifies the memory type as SPI Serial Flash. Byte 3, 4AH, identifies the device as SST25VF032B. The instruction sequence is shown in Figure 21. The JEDEC Read ID instruction is terminated by a low to high transition on CE# at any time during data output ...

Page 22

... Input Rise/Fall Time 5ns (VDD = 2.7-3.6V) Limits Min Max Units 0.8 0 0.2 0 Mbit SPI Serial Flash SST25VF032B V DD 2.7-3.6V Output Load Test Conditions mA CE# = 0.1 V /0.9 V @25 MHz open CE# = 0.1 V /0.9 V @66 MHz open CE# = 0.1 V /0.9 V @80 MHz open ...

Page 23

... Min to Write Operation 25° Mhz, other pins open) A Description Output Pin Capacitance Input Capacitance Parameter Minimum Specification Endurance 10,000 Data Retention 100 Latch Up 100 + Mbit SPI Serial Flash SST25VF032B Data Sheet Minimum Units 100 100 Test Condition Maximum OUT Units Test Method ...

Page 24

... TBP of AAI-Word Programming is also 10 µs maximum time. ©2011 Silicon Storage Technology, Inc. 25 MHz Parameter Min Max 0.1 0 100 and T SCKH SCKL 24 32 Mbit SPI Serial Flash SST25VF032B Data Sheet 66 MHz 80 MHz Min Max Min Max 66 80 6.5 6 6.5 6 0.1 0.1 0.1 0 ...

Page 25

... SO SI Figure 23:Serial Output Timing Diagram ©2011 Silicon Storage Technology, Inc. T CES SCKR MSB HIGH-Z T SCKH T SCKL CLZ MSB Mbit SPI Serial Flash SST25VF032B Data Sheet T CPH T T CHS CEH T SCKF LSB HIGH-Z T CHZ LSB 1327 F24.0 S71327-04-000 1327 F23.0 02/11 ...

Page 26

... Silicon Storage Technology, Inc HLS HHH T HZ Chip selection is not allowed. All commands are rejected by the device. T PU-READ T PU-WRITE 26 32 Mbit SPI Serial Flash SST25VF032B Data Sheet T HHS T HLH T LZ 1327 F25.0 Device fully accessible Time 1327 F26.0 S71327-04-000 02/11 ...

Page 27

... Silicon Storage Technology, Inc INPUT REFERENCE POINTS V LT (0.9V ) for a logic “1” and V IHT DD HT 90%) are <5 ns Mbit SPI Serial Flash SST25VF032B Data Sheet V HT OUTPUT V LT 1327 IORef.0 (0.1V ) for a logic “0”. Measure- ILT DD (0.6V ) and V (0.4V ) ...

Page 28

... A Microchip Technology Company Product Ordering Information SST Valid combinations for SST25VF032B SST25VF032B-66-4I-S2AF SST25VF032B-80-4I-S2AF SST25VF032B-80-4I-QAE Note:Valid combinations are those products in mass production or will be in mass production. Consult your SST sales representative to confirm availability of valid combinations and to determine availability of new combi- nations. ©2011 Silicon Storage Technology, Inc. ...

Page 29

... SST Package Code: S2A ©2011 Silicon Storage Technology, Inc. TOP VIEW SIDE VIEW 5.40 5.15 2.16 8.10 1.75 7.70 0.25 0. Mbit SPI Serial Flash SST25VF032B Data Sheet 0.50 0.35 1.27 BSC 0.25 END VIEW 0.05 08-soic-EIAJ-S2A-3 1mm S71327-04-000 0° 8° 0.80 ...

Page 30

... Silicon Storage Technology, Inc. TOP VIEW SIDE VIEW 5.00 0 .10 6.00 0.10 0.80 0.70 leads the unit Mbit SPI Serial Flash SST25VF032B BOTTOM VIEW 0.2 4.0 0.076 3.4 0.05 Max CROSS SECTION 1mm 8-wson-5x6-QA-9.0 S71327-04-000 Data Sheet Pin #1 1.27 BSC ...

Page 31

... For sales office(s) location and information, please see www.microchip.com or www.sst.com. ©2011 Silicon Storage Technology, Inc. 32 Mbit SPI Serial Flash Description Silicon Storage Technology, Inc. A Microchip Technology Company www.microchip.com or www.sst.com 31 SST25VF032B Data Sheet Date Oct 2006 Mar 2008 Jul 2008 May 2009 Feb 2011 ...

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