STM8AF6268TDX STMicroelectronics, STM8AF6268TDX Datasheet - Page 12

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STM8AF6268TDX

Manufacturer Part Number
STM8AF6268TDX
Description
8 BITS MICROCONTR
Manufacturer
STMicroelectronics
Series
STM8Ar
Datasheet

Specifications of STM8AF6268TDX

Core Processor
STM8A
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
32-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Quantity
Price
Part Number:
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Manufacturer:
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Quantity:
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STM8AF6268TDX
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0
Product overview
5
5.1
5.1.1
5.1.2
5.1.3
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Product overview
This section is intended to describe the family features that are actually implemented in the
products covered by this datasheet.
For more detailed information on each feature please refer to the STM8S and STM8A
microcontroller families reference manual (RM0016).
STM8A central processing unit (CPU)
The 8-bit STM8A core is a modern CISC core and has been designed for code efficiency
and performance. It contains 21 internal registers (six directly addressable in each execution
context), 20 addressing modes including indexed indirect and relative addressing and 80
instructions.
Architecture and registers
Addressing
Instruction set
Harvard architecture
3-stage pipeline
32-bit wide program memory bus with single cycle fetching for most instructions
X and Y 16-bit index registers, enabling indexed addressing modes with or without
offset and read-modify-write type data manipulations
8-bit accumulator
24-bit program counter with 16-Mbyte linear memory space
16-bit stack pointer with access to a 64 Kbyte stack
8-bit condition code register with seven condition flags for the result of the last
instruction.
20 addressing modes
Indexed indirect addressing mode for look-up tables located anywhere in the address
space
Stack pointer relative addressing mode for efficient implementation of local variables
and parameter passing
80 instructions with 2-byte average instruction size
Standard data movement and logic/arithmetic functions
8-bit by 8-bit multiplication
16-bit by 8-bit and 16-bit by 16-bit division
Bit manipulation
Data transfer between stack and accumulator (push/pop) with direct stack access
Data transfer using the X and Y registers or direct memory-to-memory transfers
Doc ID 14952 Rev 5
STM8AF61xx, STM8AF62xx

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