SC28L92A1B,529 NXP Semiconductors, SC28L92A1B,529 Datasheet - Page 47

no-image

SC28L92A1B,529

Manufacturer Part Number
SC28L92A1B,529
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC28L92A1B,529

Transmit Fifo
16Byte
Receive Fifo
16Byte
Transmitter And Receiver Fifo Counter
No
Operating Supply Voltage (typ)
3.3/5V
Mounting
Surface Mount
Pin Count
44
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Number Of Channels
2
Lead Free Status / RoHS Status
Supplier Unconfirmed
NXP Semiconductors
SC28L92_7
Product data sheet
7.3.12 Interrupt Mask Register (IMR)
The programming of this register selects which bits in the ISR causes an interrupt output.
If a bit in the ISR is a logic 1 and the corresponding bit in the IMR is also a logic 1 the
INTRN output will be asserted. If the corresponding bit in the IMR is a zero, the state of
the bit in the ISR has no effect on the INTRN output. Note that the IMR does not mask the
programmable interrupt outputs OP3 to OP7 or the reading of the ISR.
Table 59.
Table 60.
Bit
7
6
5
4
3
2
1
0
input port
change
7
Symbol
-
-
RxRDYB
FFULLB
TxRDYB
-
-
RxRDYA
FFULLA
TxRDYA
IMR - Interrupt mask register (address 0x5) bit allocation
IMR - Interrupt mask register (address 0x5) bit description
break B
change
6
Description
Input port change.
Channel B change in break.
RxB interrupt.
TxB interrupt.
Counter ready.
Channel A change in break.
RxA interrupt.
TxA interrupt.
Rev. 07 — 19 December 2007
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
0 = not enabled
1 = enabled
3.3 V/5.0 V Dual Universal Asynchronous Receiver/Transmitter
RxRDYB
FFULLB
5
TxRDYB
4
counter
ready
3
break A
change
2
RxRDYA
FFULLA
SC28L92
© NXP B.V. 2007. All rights reserved.
1
TxRDYA
47 of 73
0

Related parts for SC28L92A1B,529