SC16C750IA44 NXP Semiconductors, SC16C750IA44 Datasheet - Page 9

• Manufacturer Part Number: SC16C750IA44
• Manufacturer: NXP Semiconductors

Specifications of SC16C750IA44

• Transmit Fifo: 64Byte
• Receive Fifo: 64Byte
• Transmitter And Receiver Fifo Counter: Yes
• Package Type: PLCC
• Operating Supply Voltage (max): 5.5V
• Mounting: Surface Mount
• Pin Count: 44
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Number Of Channels: 1
• Lead Free Status / RoHS Status: Compliant

Philips Semiconductors
6. Functional description
9397 750 11623
Product data
6.1 Internal registers
The SC16C750 provides serial asynchronous receive data synchronization,
parallel-to-serial and serial-to-parallel data conversions for both the transmitter and
receiver sections. These functions are necessary for converting the serial data
stream into parallel data that is required with digital data systems. Synchronization for
the serial data stream is accomplished by adding start and stop bits to the transmit
data to form a data character (character orientated protocol). Data integrity is insured
by attaching a parity bit to the data character. The parity bit is checked by the receiver
for any transmission bit errors. The SC16C750 is fabricated with an advanced CMOS
process to achieve low drain power and high speed requirements.
The SC16C750 is an upward solution that provides 64 bytes of transmit and receive
FIFO memory, instead of none in the 16C450, or 16 in the 16C550. The SC16C750 is
designed to work with high speed modems and shared network environments that
require fast data processing time. Increased performance is realized in the
SC16C750 by the larger transmit and receive FIFOs. This allows the external
processor to handle more networking tasks within a given time. In addition, the four
selectable levels of FIFO trigger interrupt and automatic hardware flow control is
uniquely provided for maximum data throughput performance, especially when
operating in a multi-channel environment. The combination of the above greatly
reduces the bandwidth requirement of the external controlling CPU, increases
performance, and reduces power consumption.
The SC16C750 is capable of operation up to 3 Mbits/s with a 48 MHz external clock
input (at 5 V).
The rich feature set of the SC16C750 is available through internal registers.
Automatic hardware flow control, selectable transmit and receive FIFO trigger level,
selectable TX and RX baud rates, modem interface controls, and a sleep mode are
some of these features.
The SC16C750 provides 15 internal registers for monitoring and control. These
registers are shown in
in the standard 16C550. These registers function as data holding registers
(THR/RHR), interrupt status and control registers (IER/ISR), a FIFO control register
(FCR), line status and control registers (LCR/LSR), modem status and control
registers (MCR/MSR), programmable data rate (clock) control registers (DLL/DLM),
and a user accessible scratchpad register (SPR). Beyond the general 16C550
features and capabilities, the SC16C750 offers an enhanced feature register that
provides on-board hardware flow control. Register functions are more fully described
in the following paragraphs.
Rev. 04 — 20 June 2003
Table
3. Twelve registers are similar to those already available
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
UART with 64-byte FIFO
SC16C750
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