ISP1506ABS-S NXP Semiconductors, ISP1506ABS-S Datasheet - Page 22
ISP1506ABS-S
Manufacturer Part Number
ISP1506ABS-S
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1506ABS-S.pdf
(80 pages)
Specifications of ISP1506ABS-S
Number Of Transceivers
1
Esd Protection
YeskV
Operating Supply Voltage (typ)
Not RequiredV
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
Not RequiredV
Operating Supply Voltage (min)
Not RequiredV
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant
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NXP Semiconductors
ISP1506A_ISP1506B_2
Product data sheet
completed. After every reset, an RXCMD is sent to the link to update USB status
information. After this sequence, the ULPI bus is ready for use and the link can start USB
operations.
When the internal PLL is stable, the ISP1506 will drive a 60 MHz clock out from the
CLOCK pin when DIR deasserts. An example start-up sequence is shown in
The recommended power-up sequence for the link is as follows:
The ULPI interface is ready for use.
1. The link waits for 1 ms, ignoring all the ULPI pin status.
2. The link may start to detect DIR status level. If DIR is detected as LOW for three clock
cycles, the link may send a RESET command.
Rev. 02 — 28 August 2008
ISP1506A; ISP1506B
ULPI HS USB OTG transceiver
© NXP B.V. 2008. All rights reserved.
Figure
21 of 79
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