ISP1507DBS-T NXP Semiconductors, ISP1507DBS-T Datasheet - Page 9

• Manufacturer Part Number: ISP1507DBS-T
• Description: RF Transceiver USB 2.0 ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1507DBS-T

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Power Supply Requirement: Single
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant
• Other names: ISP1507DBS,518

NXP Semiconductors
ISP1507C_ISP1507D_1
Product data sheet
7.6.1 V
7.4 Voltage regulator
7.5 Crystal oscillator and PLL
7.6 V
For details on controlling resistor settings, see
The ISP1507 contains a built-in voltage regulator that conditions the V
inside the ISP1507. The voltage regulator:
Remark: The REG1V8 and REG3V3 pins require external decoupling capacitors. For
details, see
The ISP1507 has a built-in crystal oscillator and a Phase-Locked Loop (PLL) for clock
generation.
The crystal oscillator takes a sine-wave input from an external crystal on the XTAL1 pin,
and converts it to a square wave clock for internal use. Alternatively, a square wave clock
of the same frequency can also be directly driven into the XTAL1 pin. Using an existing
square wave clock can save the cost of the crystal and also reduce the board size.
The PLL takes the square wave clock from the crystal oscillator, and multiplies or divides it
into various frequencies for internal use.
The PLL produces the following frequencies, irrespective of the clock source:
The ISP1507 provides three comparators, V
comparator and session end comparator, to detect the V
This comparator is used by hosts and A-devices to determine whether the voltage on
V
comparator is V
During power-up, it is expected that the comparator output will be ignored.
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BUS
BUS
BUS
High-speed disconnect detector
45
1.5 k pull-up resistor on DP for full-speed peripheral mode
15 k bus terminations on DP and DM for host and OTG modes
Supports input supply range of 3.0 V < V
Supplies internal circuitry with 1.8 V and 3.3 V
60 MHz clock for the ULPI controller
1.5 MHz for the low-speed USB data
12 MHz for the full-speed USB data
480 MHz for the high-speed USB data
Other internal frequencies for data conversion and data recovery
is at a valid level for operation. The ISP1507 minimum threshold for the V
valid comparator
comparators
high-speed bus terminations on DP and DM for peripheral and host modes
Section
A_VBUS_VLD
16.
Rev. 01 — 28 May 2008
. Any voltage on V
ULPI HS USB host and peripheral transceiver
BUS
CC
BUS
ISP1507C; ISP1507D
Table
< 3.6 V
valid comparator, session valid
below V
7.
BUS
A_VBUS_VLD
voltage level.
is considered a fault.
CC
© NXP B.V. 2008. All rights reserved.
supply for use
BUS
valid
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