ADV7190KSTZ Analog Devices Inc, ADV7190KSTZ Datasheet - Page 12

• Manufacturer Part Number: ADV7190KSTZ
• Manufacturer: Analog Devices Inc

Specifications of ADV7190KSTZ

• Number Of Dac's: 6
• Adc/dac Resolution: 10b
• Screening Level: Commercial
• Package Type: LQFP
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

ADV7190/ADV7191
Programmable gamma correction is also available. Figure 6 shows
the response of different gamma values to a ramp signal.
The on-board SSAF (Super Subalias Filter) with extended
luminance frequency response and sharp stopband attenuation
enables studio quality video playback on modern TVs, giving
optimal horizontal line resolution. An additional sharpness
control feature allows high-frequency enhancement on the lumi-
nance signal.
The device is driven by a 27 MHz clock. Data can be output at
27 MHz or 54 MHz (on-board PLL) when 4 oversampling is
enabled. Also, the output filter requirements in 4 oversampling
and 2 oversampling differ, as can be seen in Figure 7.
–30dB
Figure 7. Output Filter Requirements in 4 ¥ Oversampling
Mode
0dB
Figure 6. Signal Input (Ramp) and Selectable Gamma
Output Curves
MPEG2
Figure 8. PLL and 4 ¥ Oversampling Block Diagram
300
250
200
150
100
50
0
0
6.75MHz
GAMMA CORRECTION BLOCK OUTPUT
TO A RAMP INPUT FOR VARIOUS GAMMA VALUES
PIXEL BUS
27MHz
2
REQUIREMENTS
50
13.5MHz
FILTER
0.3
ADV7190/ADV7191
100
1.5
0.5
SIGNAL OUTPUTS
LOCATION
PLL
ENCODER
27.0MHz
CORE
1.8
150
54MHz
4
REQUIREMENTS
200
40.5MHz
O
O
2
N
T
E
R
P
L
A
T
N
I
I
FILTER
D
A
C
O
U
U
6
T
P
T
S
250
54MHz
OUTPUT
RATE
54.0MHz
–12–
The ADV7190/ADV7191 also supports both PAL and NTSC
square pixel operation. In this case the encoder requires a
24.5454 MHz Clock for NTSC or 29.5 MHz Clock for PAL
square pixel mode operation. All internal timing is generated
on-chip.
An advanced power management circuit enables optimal control
of power consumption in normal operating modes or sleep modes.
The Output Video Frames are synchronized with the incoming
data Timing Reference Codes. Optionally, the Encoder accepts
(and can generate) HSYNC, VSYNC, and FIELD timing signals.
These timing signals can be adjusted to change pulsewidth and
position while the part is in master mode.
HSO/CSO and VSO TTL outputs are also available and are timed
to the analog output video.
A separate teletext port enables the user to directly input teletext
data during the vertical blanking interval.
The ADV7190/ADV7191 also incorporates WSS and CGMS-A
data control generation. The ADV7190 incorporates Macrovision
Rev 7.1.
The ADV7190/ADV7191 modes are set up over a 2-wire
serial bidirectional port (I
addresses, and the device is register-compatible with the
ADV7172/ADV7173.
The ADV7190ADV7191 is packaged in a 64-lead LQFP
package.
DATA PATH DESCRIPTION
For PAL B, D, G, H, I, M, N, and NTSC M, N modes, YCrCb
4:2:2 Data is input via the CCIR-656/601-compatible Pixel
Port at a 27 MHz data rate. The pixel data is demultiplexed to
form three data paths. Y typically has a range of 16 to 235, Cr
and Cb typically have a range of 128+/–112; however, it is
possible to input data from 1 to 254 on both Y, Cb, and Cr.
The ADV7190/ADV7191 supports PAL (B, D, G, H, I, N) and
NTSC M, N (with and without Pedestal) PAL.M (ADV7190
only) and PAL60 standards. Digital Noise Reduction can be
applied to the Y signal. Programmable gamma correction can also
be applied to the Y signal if required.
The Y data can be manipulated for contrast control and a set-up
level can be added for brightness control. The Cr, Cb data can
be scaled to achieve color saturation control. All settings become
effective at the start of the next field when double buffering is
enabled.
The appropriate sync, blank, and burst levels are added to the
YCrCb data. Macrovision antitaping, (ADV7190 only) Closed-
Captioning, and Teletext levels are also added to Y and the
resultant data is interpolated to 54 MHz when 4¥ Oversampling
is enabled. The interpolated data is filtered and scaled by three
digital FIR filters.
The U and V signals are modulated by the appropriate Subcarrier
Sine/Cosine waveforms and a phase offset may be added onto
the color subcarrier during active video to allow hue adjustment.
The resulting U and V signals are added together to make up
the Chrominance Signal. The Luma (Y) signal can be delayed
by up to six clock cycles (at 27 MHz) and the Chroma signal
can be delayed by up to eight clock cycles (at 27 MHz). The
2
C-compatible) with two slave
REV. B